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GS4901B Datasheet, PDF (77/95 Pages) Gennum Corporation – SD Clock and Timing Generator with GENLOCK
GS4901B/GS4900B Preliminary Data Sheet
Table 3-13: Configuration and Status Registers (Continued)
Register Name
Address Bit
Description
R/W Default
Output_Select_1
Output_Select_2
Output_Select_3
Output_Select_4
43h
15-5
Reserved. Set these bits to zero when writing to 43h. –
–
43h
4
Current_1 - selects the current drive capability of the
R/W
0
TIMING_OUT_1 pin. Set this bit HIGH for high current
drive. Otherwise, the current drive will be low.
Reference: Section 3.8.4 on page 61
43h
3-0
This register is used to select one of the 10
R/W
0001b
pre-programmed or 4 user programmed timing signals
available for output on the TIMING_OUT_1 pin. See
Table 3-11 for more details.
Note: The default setting of this register is 0001b, which
corresponds to H Sync.
Reference: Section 3.8.4 on page 61
44h
15-5
Reserved. Set these bits to zero when writing to 44h. –
–
44h
4
Current_2 - selects the current drive capability of the
R/W
0
TIMING_OUT_2 pin. Set this bit HIGH for high current
drive. Otherwise, the current drive will be low.
Reference: Section 3.8.4 on page 61
44h
3-0
This register is used to select one of the 10
R/W
0010b
pre-programmed or 4 user programmed timing signals
available for output on the TIMING_OUT_2 pin. See
Table 3-11 for more details.
Note: The default setting of this register is 0010b, which
corresponds to H Blanking.
Reference: Section 3.8.4 on page 61
45h
15-5
Reserved. Set these bits to zero when writing to 45h. –
–
45h
4
Current_3 - selects the current drive capability of the
R/W
0
TIMING_OUT_3 pin. Set this bit HIGH for high current
drive. Otherwise, the current drive will be low.
Reference: Section 3.8.4 on page 61
45h
3-0
This register is used to select one of the 10
R/W
0011b
pre-programmed or 4 user programmed timing signals
available for output on the TIMING_OUT_3 pin. See
Table 3-11 for more details.
Note: The default setting of this register is 0011b, which
corresponds to V Sync.
Reference: Section 3.8.4 on page 61
46h
15-5
Reserved. Set these bits to zero when writing to 46h. –
–
46h
4
Current_4 - selects the current drive capability of the
R/W
0
TIMING_OUT_4 pin. Set this bit HIGH for high current
drive. Otherwise, the current drive will be low.
Reference: Section 3.8.4 on page 61
46h
3-0
This register is used to select one of the 10
R/W
0100b
pre-programmed or 4 user programmed timing signals
available for output on the TIMING_OUT_4 pin. See
Table 3-11 for more details.
Note: The default setting of this register is 0100b, which
corresponds to V Blanking.
Reference: Section 3.8.4 on page 61
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