GS4901B Datasheet, PDF (46/95 Pages) Gennum Corporation – SD Clock and Timing Generator with GENLOCK

GS4901B/GS4900B Preliminary Data Sheet
3.5.4 Allowable Frequency Drift on the Reference
By default, the frequency of the reference H pulse on HSYNC may drift from its
expected value by approximately +/- 0.2% before the internal video PLL loses lock.
This tolerance may be adjusted using the Max_Ref_Delta register at address 1Eh
of the host interface.
The encoding scheme is shown in Table 3-3. The default value of the register is Bh.
NOTE: Regardless of the setting of this register, the device will always differentiate
between 59.94Hz and 60Hz reference standards.
Table 3-3: Max_Ref_Delta Encoding Scheme
Register
Setting
Maximum Allowable
Frequency Drift
Register
Setting
Maximum Allowable
Frequency Drift
0h
+/- 2 ^-20
8h
+/- 2 ^-12
1h
+/- 2 ^-19
9h
+/- 2 ^-11
2h
+/- 2 ^-18
Ah
+/- 2 ^-10
3h
+/- 2 ^-17
Bh
+/- 2 ^-9
4h
+/- 2 ^-16
Ch
+/- 2 ^-8
5h
+/- 2 ^-15
Dh
+/- 2 ^-7
6h
+/- 2 ^-14
Eh
+/- 2 ^-6
7h
+/- 2 ^-13
Fh
+/- 2 ^-5
The maximum allowable frequency drift is measured as a fraction of the frequency of the reference
H pulse.
3.6 Genlock
When both the REF_LOST output and the GENLOCK input are LOW, the device
will attempt to genlock the output clock and timing signals to the input reference.
NOTE: The user must apply a reference to the input of the device prior to setting
GENLOCK = LOW. If the GENLOCK pin is set LOW and no reference signal is
present, the generated clock and timing outputs of the device may correspond to
the internal default settings of the chip until a reference is applied.
Once reference validity is established and the reference format is recognized, the
device uses an internal cross-reference genlock look-up table to determine
whether the input can be used to genlock the output. A simplified version of this
look-up table is shown in Table 3-4. The table represents a matrix with the
VID_STD[5:0] number representation of each possible reference format along the
top axis, and the VID_STD[5:0] representation of each possible output timing
format along the vertical axis. A shaded box indicates that the output format can be
automatically genlocked to the input reference.
37703 - 0 April 2006
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