GS4901B Datasheet, PDF (31/95 Pages) Gennum Corporation – SD Clock and Timing Generator with GENLOCK

GS4901B/GS4900B Preliminary Data Sheet
Table 2-2: AC Electrical Characteristics (Continued)
V_DD = 1.8V, T_A = 0°C to 70°C, unless otherwise specified.
Parameter
Symbol
Condition
Min
Typ
Max Units Notes
PCLK3 Rise/Fall Time
–
20% - 80%
PCLK Outputs Relative Timing
–
Skew
ACLK Frequency
–
(GS4901B only)
ACLK Duty Cycle
–
(GS4901B only)
ACLK1-3 Rise/Fall Times
–
15pF load
20% - 80%
(GS4901B only)
–
–
–
ACLK Outputs Relative
–
Timing Skew
(GS4901B only)
Digital Timing Output Delay Time t_OD
Digital Timing Output Hold Time
t_OH
Digital Timing Output Rise/Fall
–
Times
15pF load
20% - 80%
–
–
–
100Ω differential load
–
10pF to ground per
pin
–
850
ps
–
default PCLK phase
-3
–
delay of zero
3
ns
3
–
0.0097
–
49.152
MHz
–
–
40
–
60
%
4
IO_VDD = 1.8V
–
current drive = LOW
–
3.0
ns
–
IO_VDD = 3.3V
–
current drive = LOW
–
1.5
ns
–
IO_VDD = 1.8V
–
current drive = HIGH
–
2.5
ns
–
IO_VDD = 3.3V
–
current drive = HIGH
–
1.4
ns
–
–
-3
–
3
ns
3
–
–
–
1
IO_VDD = 1.8V
–
current drive = LOW
IO_VDD = 3.3V
–
current drive = LOW
IO_VDD = 1.8V
–
current drive = HIGH
IO_VDD = 3.3V
–
current drive = HIGH
–
4.3
ns
5
–
–
ns
5
–
3.0
ns
–
–
1.5
ns
–
–
2.5
ns
–
–
1.4
ns
–
GSPI
GSPI Input Clock Frequency
GSPI Clock Duty Cycle
GSPI Input Setup Time
f_GSPI
–
DC_GSPI
–
t₃ in
–
Figure 3-15
–
–
10.0
MHz
6
40
–
60
%
6
1.5
–
–
ns
6
37703 - 0 April 2006
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