MB81F643242C Datasheet, PDF (39/56 Pages) Fujitsu Component Limited. – 4 X 512 K X 32 BIT SYNCHRONOUS DYNAMIC RAM

MB81F643242C-60/-70/-10 Advanced Info (AE0.1E)
TIMING DIAGRAM – 8 : READ INTERRUPTED BY BURST STOP (EXAMPLE @ BL = Full Column)
CLK
Command
(CL = 2)
BST
lBSH (2 clocks)
DQ0 to DQ31
Qn–2
Qn–1
Qn
Qn+1
Hi-Z
Command
(CL = 3)
BST
lBSH (3 clocks)
Hi-Z
DQ0 to DQ31
Qn-2
Qn-1
Qn
Qn+1
Qn+2
TIMING DIAGRAM – 9 : WRITE INTERRUPTED BY BURST STOP (EXAMPLE @ BL = 2)
CLK
Command
DQ0 to DQ31
BST
COMMAND
LAST
DATA-IN
Masked
by BST
39