MB81F643242C Datasheet, PDF (38/56 Pages) Fujitsu Component Limited. – 4 X 512 K X 32 BIT SYNCHRONOUS DYNAMIC RAM

MB81F643242C-60/-70/-10 Advanced Info (AE0.1E)
TIMING DIAGRAM – 7 : READ INTERRUPTED BY PRECHARGE (EXAMPLE @ CL = 2, BL = 4)
CLK
Command
DQ0 to DQ31
Command
DQ0 to DQ31
Command
DQ0 to DQ31
Command
DQ0 to DQ31
PRECHARGE
IROH (2 clocks)
Hi-Z
Q1
PRECHARGE
IROH (2 clocks)
Hi-Z
Q1
Q2
PRECHARGE
IROH (2 clocks)
Q1
Q2
Q3
Hi-Z
PRECHARGE
No effect (end of burst)
Q1
Q2
Q3
Q4
Note: In case of CL = 2, the lROH is 2 clocks.
In case of CL = 3, the lROH is 3 clocks.
PRECHARGE means ’ PRE’ or ’PALL’.
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