MC68HC705J1ACPE Datasheet, PDF (84/162 Pages) Freescale Semiconductor, Inc – Freescale Semiconductor, Inc.

Low-Power Modes
Freescale Semiconductor, Inc.
5.4.5 EPROM/OTPROM
The STOP instruction:
The STOP instruction during erasable, programmable read-only
memory (EPROM) programming clears the EPGM bit in the EPROM
programming register, removing the programming voltage from the
EPROM.
The WAIT instruction:
The WAIT instruction has no effect on EPROM/one-time
programmable read-only memory (OTPROM) operation.
5.4.6 Data-Retention Mode
In data-retention mode, the MCU retains random-access memory (RAM)
contents and CPU register contents at V_DD voltages as low as 2.0 Vdc.
The data-retention feature allows the MCU to remain in a low
power-consumption state during which it retains data, but the CPU
cannot execute instructions.
To put the MCU in data-retention mode:
1. Drive the RESET pin to logic 0.
2. Lower the V_DD voltage. The RESET pin must remain low
continuously during data-retention mode.
To take the MCU out of data-retention mode:
1. Return V_DD to normal operating voltage.
2. Return the RESET pin to logic 1.
Technical Data
MC68HC705J1A — Rev. 4.0
Low-Power Modes
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