MC68HC705J1ACPE Datasheet, PDF (35/162 Pages) Freescale Semiconductor, Inc – Freescale Semiconductor, Inc.

Freescale Semiconductor, Inc.
Memory
Input/Output Register Summary
2.4 Input/Output Register Summary
Addr.
Register Name
Bit 7
6
Read:
Port A Data Register
PA7
PA6
$0000
(PORTA) Write:
See page 89.
Reset:
Read: 0
0
Port B Data Register
$0001
(PORTB) Write:
See page 92.
Reset:
$0002
Unimplemented
5
4
3
2
PA5
PA4
PA3
PA2
Unaffected by reset
PB5
PB4
PB3
PB2
Unaffected by reset
1
Bit 0
PA1
PA0
PB1
PB0
$0003
Unimplemented
$0004
Read:
Data Direction Register A
(DDRA) Write:
See page 90.
Reset:
DDRA7
0
DDRA6
0
DDRA5
0
DDRA4
0
DDRA3
0
DDRA2
0
DDRA1
0
DDRA0
0
Read: 0
Data Direction Register B
$0005
(DDRB) Write:
See page 93.
Reset: 0
0
DDRB5 DDRB4 DDRB3 DDRB2 DDRB1 DDRB0
0
0
0
0
0
0
0
$0006
Unimplemented
$0007
Unimplemented
Read: TOF
RTIF
0
0
Timer Status and Control
TOIE RTIE
RT1
RT0
$0008
Register (TSCR) Write:
TOFR RTIFR
See page 112.
Reset: 0
0
0
0
0
0
1
1
= Unimplemented R = Reserved
Figure 2-2. I/O Register Summary (Sheet 1 of 3)
MC68HC705J1A — Rev. 4.0
Memory
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Technical Data