MC68HC705J1ACPE Datasheet, PDF (79/162 Pages) Freescale Semiconductor, Inc – Freescale Semiconductor, Inc.

Freescale Semiconductor, Inc.
Technical Data — MC68HC705J1A
Section 5. Low-Power Modes
5.1 Contents
5.2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
5.3 Exiting Stop and Wait Modes . . . . . . . . . . . . . . . . . . . . . . . . . . 80
5.4 Effects of Stop and Wait Modes . . . . . . . . . . . . . . . . . . . . . . . .81
5.4.1 Clock Generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .81
5.4.2 CPU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
5.4.3 COP Watchdog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
5.4.4 Timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
5.4.5 EPROM/OTPROM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
5.4.6 Data-Retention Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
5.5 Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
5.2 Introduction
The microcontroller unit (MCU) can enter these low-power standby
modes:
• Stop mode — The STOP instruction puts the MCU in its lowest
power-consumption mode.
• Wait mode — The WAIT instruction puts the MCU in an
intermediate power-consumption mode.
• Halt mode — Halt mode is identical to wait mode, except that an
oscillator stabilization delay of 1 to 4064 internal clock cycles
occurs when the MCU exits halt mode. The stop-to-wait
conversion bit, SWAIT, in the mask option register, enables halt
mode.
MC68HC705J1A — Rev. 4.0
Low-Power Modes
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Technical Data