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MC68HC705J1ACPE Datasheet, PDF (61/162 Pages) Freescale Semiconductor, Inc – Freescale Semiconductor, Inc.
Freescale Semiconductor, Inc.
Central Processor Unit (CPU)
Instruction Set Summary
3.7 Instruction Set Summary
Source
Form
ADC #opr
ADC opr
ADC opr
ADC opr,X
ADC opr,X
ADC ,X
ADD #opr
ADD opr
ADD opr
ADD opr,X
ADD opr,X
ADD ,X
AND #opr
AND opr
AND opr
AND opr,X
AND opr,X
AND ,X
ASL opr
ASLA
ASLX
ASL opr,X
ASL ,X
ASR opr
ASRA
ASRX
ASR opr,X
ASR ,X
BCC rel
BCLR n opr
BCS rel
BEQ rel
BHCC rel
BHCS rel
Table 3-6. Instruction Set Summary (Sheet 1 of 6)
Operation
Add with Carry
Add without Carry
Logical AND
Arithmetic Shift Left (Same as LSL)
Arithmetic Shift Right
Branch if Carry Bit Clear
Clear Bit n
Branch if Carry Bit Set (Same as BLO)
Branch if Equal
Branch if Half-Carry Bit Clear
Branch if Half-Carry Bit Set
Description
A ← (A) + (M) + (C)
A ← (A) + (M)
A ← (A) ∧ (M)
C
b7
0
b0
C
b7
b0
PC ← (PC) + 2 + rel ? C = 0
Mn ← 0
PC ← (PC) + 2 + rel ? C = 1
PC ← (PC) + 2 + rel ? Z = 1
PC ← (PC) + 2 + rel ? H = 0
PC ← (PC) + 2 + rel ? H = 1
Effect
on CCR
H I NZC
IMM A9 ii 2
DIR B9 dd 3
—  
EXT
IX2
C9 hh ll 4
D9 ee ff 5
IX1 E9 ff 4
IX F9
3
IMM AB ii 2
DIR BB dd 3
—  
EXT
IX2
CB hh ll 4
DB ee ff 5
IX1 EB ff 4
IX FB
3
IMM A4 ii 2
DIR B4 dd 3
——   —
EXT
IX2
C4 hh ll 4
D4 ee ff 5
IX1 E4 ff 4
IX F4
3
DIR 38 dd 5
INH 48
3
— —    INH 58
3
IX1 68 ff 6
IX 78
5
DIR 37 dd 5
INH 47
3
— —    INH 57
3
IX1 67 ff 6
IX 77
5
— — — — — REL 24 rr 3
DIR (b0) 11 dd 5
DIR (b1) 13 dd 5
DIR (b2) 15 dd 5
—
———
—
DIR (b3)
DIR (b4)
17
19
dd
dd
5
5
DIR (b5) 1B dd 5
DIR (b6) 1D dd 5
DIR (b7) 1F dd 5
— — — — — REL 25 rr 3
— — — — — REL 27 rr 3
— — — — — REL 28 rr 3
— — — — — REL 29 rr 3
MC68HC705J1A — Rev. 4.0
Central Processor Unit (CPU)
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Technical Data