MC68HC705J1ACPE Datasheet, PDF (73/162 Pages) Freescale Semiconductor, Inc – Freescale Semiconductor, Inc.

4.4 Interrupts
Freescale Semiconductor, Inc.
Resets and Interrupts
Interrupts
These sources can generate interrupts:
• Software interrupt (SWI) instruction
• External interrupt pins:
– IRQ/V_PP
– PA0–PA3
• Timer:
– Real-time interrupt flag (RTIF)
– Timer overflow flag (TOF)
An interrupt temporarily stops the program sequence to process a
particular event. An interrupt does not stop the operation of the
instruction being executed, but takes effect when the current instruction
completes its execution. Interrupt processing automatically saves the
CPU registers on the stack and loads the program counter with a
user-defined interrupt vector address.
4.4.1 Software Interrupt
The software interrupt (SWI) instruction causes a non-maskable
interrupt.
4.4.2 External Interrupt
An interrupt signal on the IRQ/V_PP pin latches an external interrupt
request. When the CPU completes its current instruction, it tests the IRQ
latch. If the IRQ latch is set, the CPU then tests the I bit in the condition
code register. If the I bit is clear, the CPU then begins the interrupt
sequence.
MC68HC705J1A — Rev. 4.0
Resets and Interrupts
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Technical Data