PXD10 Datasheet, PDF (74/130 Pages) Lumins Inc. – 4” Dia.X 6” extruded aluminum step poles

Electrical characteristics
VDDREG HV supply
VDDREG HV POR (internal)
1.2 V regulator output
Soft startup (approx. 200 s)
 2.7 V
> 1.5 V
Time to discharge 40 F
Capacitance depends on load
VDD IO HV supply (3–5.5 V)
Figure 7. Recommended order for powering down the power supplies
CAUTION
The VDD IO HV supply must be disabled after the VDDREG HV supply
voltage drops below 1.5 V. This is to ensure that the 1.2 V regulator shuts
down before the 3.3 V regulator shuts down.
3.7.5 Power-up inrush current profile
Figure 8 shows the power up inrush current profile of the ballast transistor under the worst possible startup
condition (fastest PVT and fastest power ramp time).
1.2 V supply
Base control
Current profile
3–5.5 V
Figure 8. Power-up inrush current profile
PXD10 Microcontroller Data Sheet, Rev. 1
74
Freescale Semiconductor