PXD10 Datasheet, PDF (101/130 Pages) Lumins Inc. – 4” Dia.X 6” extruded aluminum step poles

Electrical characteristics
Table 48. ADC conversion characteristics (continued)
Symbol C
Parameter
Conditions¹
Value
Unit
Min Typ Max
OFS CC T Offset error
After offset cancellation
—
0.5
— LSB
GNE CC T Gain error
—
0.6
— LSB
TUEx CC P Total unadjusted error for Without current injection
extended channel
T
With current injection
–3
—
3
LSB
–4
—
4
NOTES:
1 _{VDDA = 3.3 V ± 10% / 5.0 V ± 10%, TA = 40 to 105 °C, unless otherwise specified.}
2 _{Analog and digital VSS must be common (to be tied together externally).}
3 _{VAINx may exceed VSSA and VDDA limits, remaining on absolute maximum ratings, but the results of the conversion}
will be clamped respectively to 0x000 or 0x3FF
4 _{During the sample time the input capacitance CS can be charged/discharged by the external source. The internal}
resistance of the analog source must allow the capacitance to reach its final voltage level within t_{ADC_S}. After the
end of the sample time t_{ADC_S}, changes of the analog input voltage have no effect on the conversion result. Values
for the sample clock t_{ADC_S} depend on programming.
5 _{The maximum sample rate is 1 million samples per second, provided the source impedance and current}
limiter(>1 k) are calculated adequately.
- Filter capacitor at analog source output must meet the criteria Cf (filter capacitor) > 2048*Cs (sampling capacitor
which is 3 pF)
6 _{This parameter does not include the sample time tADC_S, but only the time for determining the digital result and the}
time to load the result’s register with the conversion result.
3.18 LCD driver electrical characteristics
Table 49. LCD driver specifications
Symbol
C
Parameter
Value¹
Unit
Min
Typ
Max
VLCD
SR C Voltage on VLCD (LCD supply) pin with
0
respect to VSS
—
VDDE + 0.3 V
Z_BP/FP
CC T LCD output impedance
—
(BP[n-1:0],FP[m-1:0]) for output levels
VLCD, VSS²
—
5.0
k
I_BP/FP
CC T LCD output current
(BP[n-1:0],FP[m-1:0]) for outputs
—
25
—
A
charge/discharge voltage levels
VLCD2/3, VLCD1/2, VLCD1/3)²,³
NOTES:
1 _{VDD = 5.0 V ± 10%, TA = –40–105 °C, unless otherwise specified}
2 _{Outputs measured one at a time, low impedance voltage source connected to the VLCD pin.}
3 _{With PWR=10, BSTEN=0, and BSTAO=0}
PXD10 Microcontroller Data Sheet, Rev. 1
Freescale Semiconductor
101