PXD10 Datasheet, PDF (53/130 Pages) Lumins Inc. – 4” Dia.X 6” extruded aluminum step poles

Pinout and signal descriptions
Table 8. Signal details (continued)
Signal
SIN_0,
SIN_1
SOUT_0,
SOUT_1
PCS0_2
Peripheral
DSPI
DSPI
QuadSPI
IO2/PCS1_2
QuadSPI
IO3/PCS2_2
QuadSPI
IO0/SIN_2
QuadSPI
IO1/SOUT_2
QuadSPI
SCK_2
QuadSPI
eMIOSA[8:23],
eMIOSB[16:23]
eMIOS
CANRX_0,
CANRX_1
FlexCAN
CANTX_0, CANTX_1 FlexCAN
SCL_0,
I²C
SCL_1,
SCL_2,
SCL_3
SDA_0,
I²C
SDA_1,
SDA_2,
SDA_3
TCK
JTAG
TDI
JTAG
TDO
JTAG
TMS
JTAG
BP[0:3]
FP[0:39]
EVTI
EVTO
LCD
LCD
Nexus
Nexus
SPI data input signal
Description
SPI data output signal
Peripheral chip select for serial flash mode or chip select 0 for SPI
master mode
Chip select 1 for SPI master mode and bidirectional IO2 for serial
flash mode
Chip select 2 for SPI master mode and bidirectional IO3 for serial
flash mode
Data input signal for SPI master and slave modes and bidirectional
IO0 for serial flash mode
Data output signal for SPI master and slave modes and bidirectional
IO1 for serial flash mode
Clock output signal for SPI master and serial flash modes and clock
input signal for SPI slave mode
Enhanced Modular Input Output System. 16+8 channel eMIOS for
timed input or output functions.
Receive (RX) pins for the CAN bus transceiver
Transmit (TX) pins for the CAN bus transceiver
Bidirectional serial clock compatible with I²C specifications
Bidirectional serial data compatible with I²C specifications
Debug port serial clock as per JTAG specifications
Debug port serial data input port as per JTAG standards
specifications
Debug port serial data output port as per JTAG standards
specifications
Debug port Test Mode Select signal for the JTAG TAP controller state
machine and indicates various state transitions for the TAP controller
in the device
Backplane signals from the LCD controlling the backplane reference
voltage for the LCD display
Frontplane signals for LCD segments
Nexus2+ event input trigger
Nexus2+ event output trigger
PXD10 Microcontroller Data Sheet, Rev. 1
Freescale Semiconductor
53