MC68HC05SU3A Datasheet, PDF (74/80 Pages) Freescale Semiconductor, Inc – Fully static chip design featuring the industry standard 8-bit M68HC05 core

Freescale Semiconductor, Inc.
11.1
40-Pin DIP Package (Case 711-03)
40
1
H
A
G
F
21
B
20
C
N
D
K
SEATING
PLANE
L
J
M
NOTES:
1. POSITIONAL TOLERANCE OF LEADS (D), SHALL
BE WITHIN 0.25 mm (0.010) AT MAXIMUM
MATERIAL CONDITION, IN RELATION TO SEATING
PLANE AND EACH OTHER.
2. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
3. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
MILLIMETERS
INCHES
DIM MIN MAX MIN MAX
A 51.69 52.45 2.035 2.065
B 13.72 14.22 0.540 0.560
C 3.94 5.08 0.155 0.200
D 0.36 0.56 0.014 0.022
F 1.02 1.52 0.040 0.060
G
2.54 BSC
0.100 BSC
H 1.65 2.16 0.065 0.085
J 0.20 0.38 0.008 0.015
K 2.92 3.43 0.115 0.135
L
15.24 BSC
0.600 BSC
M
0° 15°
0° 15°
N 0.51 1.02 0.020 0.040
Figure 11-1 40-pin DIP Package
11.2
42-Pin SDIP Package (Case 858-01)
11
-A-
42
22
-B-
1
21
C
L
H
-T-
SEATING
PLANE
F
G
D 42 PL
0.25 (0.010) M T A S
N
M
K
J 42 PL
0.25 (0.010) M T B S
NOTES:
1. DIMENSIONS AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
4. DIMENSIONS A AND B DO NOT INCLUDE MOLD
FLASH. MAXIMUM MOLD FLASH 0.25 (0.010).
INCHES
MILLIMETERS
DIM MIN MAX MIN MAX
A 1.435 1.465 36.45 37.21
B 0.540 0.560 13.72 14.22
C 0.155 0.200 3.94 5.08
D 0.014 0.022 0.36 0.56
F 0.032 0.046 0.81 1.17
G 0.070 BSC
1.778 BSC
H 0.300 BSC
7.62 BSC
J 0.008 0.015 0.20 0.38
K 0.115 0.135 2.92 3.43
L 0.600 BSC
15.24 BSC
M 0° 15° 0° 15°
N 0.020 0.040 0.51 1.02
Figure 11-2 42-pin SDIP Package
TPG
MECHANICAL SPECIFICATIONS
MC68HC05SU3A
11-2
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