MC68HC05SU3A Datasheet, PDF (19/80 Pages) Freescale Semiconductor, Inc – Fully static chip design featuring the industry standard 8-bit M68HC05 core

Freescale Semiconductor, Inc.
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PIN DESCRIPTIONS
This section provides a description of the functional pins of the MC68HC05SU3A microcontroller.
2.1
Functional Pin Descriptions
PIN NAME
VDD
VSS
VSS(INT)
VSS(EXT)
VPP
IRQ
RESET
TIMER
OSC1, OSC2
40-pin PDIP
PIN No.
4
1
—
—
7
42-pin SDIP
PIN No.
5
—
1
2
8
44-pin QFP
PIN No.
10, 33
32
6
7
13
3
4
9
2
3
8
8
9
14
5, 6
6, 7
11, 12
DESCRIPTION
Power is supplied to the MCU using these pins.
VDD should be connected to the positive supply.
VSS, VSS(INT), and VSS(EXT) should be connected to
supply ground.
This is not used, it should be connected to VDD or VSS.
IRQ is software programmable to provide two choices of
interrupt triggering sensitivity. These options are:
1) negative-edge-sensitive triggering only, or
2) both negative-edge-sensitive and level-sensitive
triggering.
This pin has an integrated pull-up resistor to VDD but should
be tied to VDD if not needed to improve noise immunity. The
IRQ pin contains an internal Schmitt trigger as part of its
input to improve noise immunity. The voltage on this pin may
affect the mode of operation as described in Section 9.
This pin can be used as an input to reset the MCU to a
known start-up state by pulling it to the low state. The
RESET pin contains an internal Schmitt trigger to improve
its noise immunity as an input. It also has an internal
pull-down device that pulls the RESET pin low during the
power-on reset cycles and an integrated pull-up resistor to
VDD.
The TIMER pin provides an optional gating input to the timer.
Refer to Section 6 for additional information.
The OSC1 and OSC2 pins are the connections for the
on-chip oscillator. See Section 2.2 for detail.
TPG
MC68HC05SU3A
PIN DESCRIPTIONS
For More Information On This Product,
2-1
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