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MC68HC05SU3A Datasheet, PDF (71/80 Pages) Freescale Semiconductor, Inc – Fully static chip design featuring the industry standard 8-bit M68HC05 core
Freescale Semiconductor, Inc.
10.4
Control Timing
Table 10-2 Control Timing
(VDD=5.0Vdc ±10%, VSS=0Vdc, temperature range=0 to 70°C)
CHARACTERISTICS
SYMBOL MINIMUM MAXIMUM UNIT
Frequency of operation
RC oscillator Option
Crystal option
External clock option
fOSC
0.1
0.1
dc
4.0
MHz
4.0
MHz
4.0
MHz
Internal operating frequency (fOSC/2)
RC oscillator
Crystal
External clock
fOP
—
—
2.0
MHz
2.0
MHz
dc
2.0
MHz
Processor cycle time (1/fOP)
tCYC
500
—
ns
RC oscillator stabilization time
tRCON
—
1
ms
Crystal oscillator start-up time (crystal oscillator)
tOXOV
—
100
ms
Stop recovery start-up time (crystal oscillator)
tILCH
—
100
ms
RESET pulse width low
Timer resolution(2)
tRL
1.5
tRESL
4.0
—
tCYC
—
tCYC
Interrupt pulse width low (edge-triggered)
tILIH
125
—
ns
Interrupt pulse period
tILIL
See note (3)
—
tCYC
PA0-PA7 interrupt pulse width high (edge-triggered)
tIHIL
125
—
ns
PA0-PA7 interrupt pulse period
tIHIH See note (3)
—
tCYC
OSC1 pulse width
t
90
—
ns
RC oscillator frequency combined stability(4)
fOSC=2.0MHz, VDD=5.0Vdc±10%, tA=–40°C to +85°C ∆fOSC
—
fOSC=2.0MHz, VDD=5.0Vdc±10%, tA=0°C to +40°C
∆fOSC
—
± 25
%
± 15
%
Notes:
(1) VDD=5.0Vdc±10%, VSS=0Vdc, tA=tL to tH
(2) The TIMER input pin is the limiting factor in determining timer resolution.
(3) The minimum period tILIL or tIHIH should not be less than the number of cycles it takes to execute the interrupt service routine plus 19 tCYC.
(4) Effects of processing, temperature, and supply voltage (excluding tolerances of external R and C).
10
MC68HC05SU3A
ELECTRICAL SPECIFICATIONS
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TPG
10-3