MC68HC05SU3A Datasheet, PDF (20/80 Pages) Freescale Semiconductor, Inc – Fully static chip design featuring the industry standard 8-bit M68HC05 core

Freescale Semiconductor, Inc.
2
PIN NAME
40-pin PDIP 42-pin SDIP 44-pin QFP
PIN No.
PIN No.
PIN No.
DESCRIPTION
These eight I/O lines comprise port A. The state of any pin
is software programmable. All port A lines are configured as
input during power-on or external reset.
PA0-PA7 are also associated with the Keyboard Interrupt
PA0-PA7
33-40
34-41
42-44, 1-5 function. Each pin is equipped with a programmable
integrated 20KΩ pull-up resistor connected to VDD when
configured as input. When programmed as output, each pin
can provide a current drive of 10mA. See Section 3 for
details on the I/O ports.
PB0-PB7
25-32
26-33
31, 35-41
These eight I/O lines comprise port B. The state of any pin
is software programmable. All port B lines are configured as
input during power-on or external reset.
PB0 and PB1 are equipped with an integrated 1.9KΩ pull-up
resistor. PB2-PB7 are equipped with a programmable
integrated 20KΩ pull-up resistor connected to VDD when
configured as input. When programmed as output, each pin
can provide a current drive of 10mA. PB5-PB7 can also be
programmed to provide a lower current drive of 2mA. See
Section 3 for details on the I/O ports.
PC0-PC7
These eight I/O lines comprise port C. The state of any pin
is software programmable. All port C lines are configured as
input during power-on or external reset.
9-16
10-17
15-22
Each pin is equipped with a programmable integrated 20KΩ
pull-up resistor connected to VDD when configured as input.
When programmed as output, each pin can provide a
current drive of 10mA. See Section 3 for details on the I/O
ports.
PD0-PD7
IRQ2
24-21, 20-17 25-22, 21-18 30-23
18
19
24
These eight I/O lines comprise port D. The state of any pin
is software programmable. All port D lines are configured as
input during power-on or external reset.
Each pin is equipped with a programmable integrated 20KΩ
pull-up resistor connected to VDD when configured as input.
When programmed as output, each pin can provide a
current drive of 10mA.
PD6 is configured as IRQ2 by setting IRQ2E in the
Miscellaneous Control Register ($0C).
See Section 3 for details on the I/O ports.
2.2
OSC1 and OSC2 Connections
The OSC1 and OSC2 pins are the connections for the on-chip oscillator — the following
configurations are available:
1) A crystal or ceramic resonator as shown in Figure 2-1(a).
2) An external clock signal as shown in Figure 2-1(b).
3) RC options as shown in Figure 2-1(c) and Figure 2-1(d).
The external oscillator clock frequency, f_OSC, is divided by two to produce the internal operating
frequency, f_OP.
TPG
PIN DESCRIPTIONS
MC68HC05SU3A
2-2
For More Information On This Product,
Go to: www.freescale.com