MC68HC05SU3A Datasheet, PDF(33/80 Page) Freescale Semiconductor, Inc – Fully static chip design featuring the industry standard 8-bit M68HC05 core

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MC68HC05SU3A Datasheet, PDF (33/80 Pages) Freescale Semiconductor, Inc – Fully static chip design featuring the industry standard 8-bit M68HC05 core

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Freescale Semiconductor, Inc.

RESETS AND INTERRUPTS

This section describes the reset and interrupt functions on the MCU.

5.1

RESETS

The MC68HC05SU3A can be reset in three ways:

â¢ by initial Power-On Reset function, (POR)

â¢ by an active low input to the RESET pin, (RESET)

â¢ by a Low Voltage Reset, (LVR)

All of these resets will cause the program to go to the starting address, speciï¬ed by the contents

of memory locations $1FFE and $1FFF, and cause the interrupt mask (I-bit) of the Condition Code

5.1.1 Power-On Reset (POR)

The power-on reset (POR) occurs on power-up to allow the clock oscillator to stabilize. The POR

is strictly for power-up conditions, and should not be used to detect any drops in power supply

voltage.

There is an oscillator stabilization delay of tPORL internal processor bus clock cycles after the

oscillator becomes active. The RESET pin will be pulled down internally during these cycles. If the

RESET pin is low (by external circuit) at the end of the tPORL period, the processor remains in the

reset condition until RESET goes high.

5.1.2 RESET Pin

The RESET input pin is used to reset the MCU to provide an orderly software start-up procedure.

When using the external reset, the RESET pin must stay low for a minimum of 1.5tCYC. The

RESET pin is connected to a Schmitt Trigger circuit as part of its input to improve noise immunity.

MC68HC05SU3A

RESETS AND INTERRUPTS

For More Information On This Product,

Go to: www.freescale.com

TPG

5-1

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