MC68HC05P9A Datasheet, PDF (67/158 Pages) Freescale Semiconductor, Inc – HCMOS Microcontroller Unit

Freescale Semiconductor, Inc.
Parallel I/O Ports
Port A
Addr.
Name:
R/W Bit 7 6
5
4
3
2
1 Bit 0
$0006
Data Direction Register C (DDRC)
Read:
Write:
DDRC7
DDRC6
DDRC5
DDRC4
DDRC3
DDRC2
DDRC1
DDRC0
Reset: 0
0
0
0
0
0
0
0
$0007
Data Direction Register D (DDRD)
Read:
Write:
0
0 _DDRD5 0
0
0
0
0
Reset: 0
0
0
0
0
0
0
0
= Unimplemented
Figure 28. Parallel I/O Port Register Summary (Continued)
Port A
Port A is an 8-bit general-purpose I/O port.
Port A Data
Register (PORTA)
The port A data register contains a latch for each of the eight port A pins.
$0000 Bit 7
6
5
4
3
2
1
Bit 0
Read:
PA7
PA6
PA5
PA4
PA3
PA2
PA1
PA0
Write:
Reset:
Unaffected by reset
Figure 29. Port A Data Register (PORTA)
PA[7:0] — Port A Data Bits
These read/write bits are software programmable. Data direction of
each port A pin is under the control of the corresponding bit in data
direction register A. Reset has no effect on port A data.
7-mc68hc05p9a
MOTOROLA
Parallel I/O Ports
67
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