MC68HC05P9A Datasheet, PDF (107/158 Pages) Freescale Semiconductor, Inc – HCMOS Microcontroller Unit

Freescale Semiconductor, Inc.
SIOP
Operation
Pin Functions
The SIOP uses three pins and shares them with port B:
• PB7/SCK
• PB6/SDI
• PB5/SDO
NOTE: Do not use the PB7/SCK, PB6/SDI, or PB5/SDO pins for
general-purpose I/O while the SIOP is enabled.
When bit 6 (SPE) of the SIOP control register (SCR) is set, the SIOP is
enabled and the PB7/SCK, PB5/SDO, and PB6/SDI pins are dedicated
to SIOP functions. Clearing SPE disables the SIOP and the SIOP pins
become standard I/O port pins.
NOTE:
Enabling and then disabling the SIOP configures the data direction
register bits associated with the SIOP pins for SIOP operation and can
also change the associated port data register. After disabling the SIOP,
initialize the data direction register and the port data register as the
application requires.
PB7/SCK
The PB7/SCK pin synchronizes the movement of data into and out of the
MCU through the PB6/SDI and PB5/SDO pins.
In master mode, the PB7/SCK pin is an output. The serial clock
frequency in master mode is one-fourth the internal clock frequency.
In slave mode, the PB7/SCK pin is an input. The maximum serial clock
frequency in slave mode is one-fourth the internal clock rate. Slave
mode has no minimum serial clock frequency.
9-mc68hc05p9a
MOTOROLA
SIOP
107
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