MC68HC05P9A Datasheet, PDF (125/158 Pages) Freescale Semiconductor, Inc – HCMOS Microcontroller Unit

Freescale Semiconductor, Inc.
ADC
Low-Power Modes
ADC Data Register The ADC data register (ADDR) is a read-only register that contains the
result of the most recent analog-to-digital conversion.
$001D Bit 7
6
Read: Bit 7
6
Write:
Reset:
5
4
3
2
5
4
3
2
Unaffected by reset
1
Bit 0
1
Bit 0
Figure 69. ADC Data Register (ADDR)
Low-Power Modes
Stop Mode
Wait Mode
The STOP instruction turns off the ADC and aborts any current and
pending conversions.
The ADC continues to operate normally after the WAIT instruction. To
reduce power consumption in wait mode:
• If the ADC is not being used, clear both the ADON and ADRC bits
before entering wait mode.
• If the ADC is being used and the internal clock rate is above
1 MHz, clear the ADRC bit before entering wait mode.
13-mc68hc05p9a
MOTOROLA
ADC
125
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