MC68HC05P9A Datasheet, PDF (114/158 Pages) Freescale Semiconductor, Inc – HCMOS Microcontroller Unit

SIOP
SIOP Status
Register
Freescale Semiconductor, Inc.
The read-only SIOP status register (SSR) contains two bits. One bit
indicates that a SIOP transfer is complete, and the other indicates that
an invalid access of the SIOP data register occurred while a transfer was
in progress.
$000B Bit 7
6
5
4
3
2
1
Bit 0
Read: SPIF DCOL
0
0
0
0
0
0
Write:
Reset: 0
0
0
0
0
0
0
0
= Unimplemented
Figure 65. SIOP Status Register (SSR)
SPIF — Serial Peripheral Interface Flag
This clearable, read-only bit is set automatically on the eighth rising
edge on the PB7/SCK pin and indicates that a data transmission took
place. SPIF does not inhibit further transmissions. Clear SPIF by
reading the SIOP status register while SPIF is set and then reading or
writing the SIOP data register. Reset clears SPIF.
1 = Transmission complete
0 = Transmission not complete
16-mc68hc05p9a
114
SIOP
MOTOROLA
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