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MC68HC05P9A Datasheet, PDF (46/158 Pages) Freescale Semiconductor, Inc – HCMOS Microcontroller Unit
Freescale Semiconductor, Inc.
CPU
Source
Form
ROL opr
ROLA
ROLX
ROL opr,X
ROL ,X
ROR opr
RORA
RORX
ROR opr,X
ROR ,X
RSP
RTI
RTS
SBC #opr
SBC opr
SBC opr
SBC opr,X
SBC opr,X
SBC ,X
SEC
SEI
STA opr
STA opr
STA opr,X
STA opr,X
STA ,X
STOP
STX opr
STX opr
STX opr,X
STX opr,X
STX ,X
SUB #opr
SUB opr
SUB opr
SUB opr,X
SUB opr,X
SUB ,X
Table 9. Instruction Set Summary (Continued)
Operation
Description
Effect on
CCR
H I NZC
Rotate Byte Left through Carry Bit
Rotate Byte Right through Carry Bit
Reset Stack Pointer
Return from Interrupt
Return from Subroutine
Subtract Memory Byte and Carry Bit from
Accumulator
Set Carry Bit
Set Interrupt Mask
Store Accumulator in Memory
Stop Oscillator and Enable IRQ Pin
Store Index Register In Memory
Subtract Memory Byte from Accumulator
C
b7
b0
C
b7
b0
SP ← $00FF
SP ← (SP) + 1; Pull (CCR)
SP ← (SP) + 1; Pull (A)
SP ← (SP) + 1; Pull (X)
SP ← (SP) + 1; Pull (PCH)
SP ← (SP) + 1; Pull (PCL)
SP ← (SP) + 1; Pull (PCH)
SP ← (SP) + 1; Pull (PCL)
A ← (A) – (M) – (C)
C←1
I←1
M ← (A)
M ← (X)
A ← (A) – (M)
DIR 39 dd 5
INH 49
3
— — ¤ ¤ ¤ INH 59
3
IX1 69 ff 6
IX 79
5
DIR 36 dd 5
INH 46
3
— — ¤ ¤ ¤ INH 56
3
IX1 66 ff 6
IX 76
5
— — — — — INH 9C
2
¤ ¤ ¤ ¤ ¤ INH 80
9
— — — — — INH 81
6
IMM A2 ii 2
DIR B2 dd 3
— — ¤ ¤ ¤ EXT C2 hh ll 4
IX2 D2 ee ff 5
IX1 E2 ff 4
IX F2
3
— — — — 1 INH 99
2
— 1 — — — INH 9B
2
DIR B7 dd 4
EXT C7 hh ll 5
— — ¤ ¤ — IX2 D7 ee ff 6
IX1 E7 ff 5
IX F7
4
— 0 — — — INH 8E
2
DIR BF dd 4
EXT CF hh ll 5
— — ¤ ¤ — IX2 DF ee ff 6
IX1 EF ff 5
IX FF
4
IMM A0 ii 2
DIR B0 dd 3
— — ¤ ¤ ¤ EXT C0 hh ll 4
IX2 D0 ee ff 5
IX1 E0 ff 4
IX F0
3
24-hc05cpu
46
CPU
MOTOROLA
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