MC68HC05P9A Datasheet, PDF (63/158 Pages) Freescale Semiconductor, Inc – HCMOS Microcontroller Unit

Wait Mode
Freescale Semiconductor, Inc.
Low-Power Modes
Wait Mode
The WAIT instruction puts the MCU in an intermediate
power-consumption mode and has the following effects on the MCU:
• Clears the I bit in the condition code register, enabling interrupts
• Stops the CPU clock, but allows the internal clock to drive the
capture/compare timer, the COP watchdog, and the ADC
The WAIT instruction does not affect any other registers or any I/O lines.
The following conditions restart the CPU clock and bring the MCU out of
wait mode:
• External interrupt — A high-to-low transition on the IRQ pin loads
the program counter with the contents of locations $1FFA and
$1FFB.
• Timer interrupt — Input capture, output compare, and timer
overflow interrupt requests load the program counter with the
contents of locations $1FF8 and $1FF9.
• COP watchdog reset — A timeout of the COP watchdog resets the
MCU and loads the program counter with the contents of locations
$1FFE and $1FFF. Software can enable timer interrupts so that
the MCU can periodically exit wait mode to reset the COP
watchdog.
• External reset — A logic 0 on the RESET pin resets the MCU and
loads the program counter with the contents of locations $1FFE
and $1FFF.
Figure 26 shows the sequence of events caused by the WAIT
instruction.
Figure 27 shows the effect of the STOP and WAIT instructions on the
CPU clock and the timer clock.
9-mc68hc05p9a
MOTOROLA
Low-Power Modes
63
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