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MC68HC908GR16 Datasheet, PDF (65/276 Pages) Motorola, Inc – Microcontrollers
Functional Description
9. Calculate and verify the adequacy of the VCO programmed center-of-range frequency, fVRS. The
center-of-range frequency is the midpoint between the minimum and maximum frequencies
attainable by the PLL.
fVRS = (L × 2E)fNOM
For proper operation,
fVRS – fVCLK
≤ -f-N----O----M------×-----2---E--
2
10. Verify the choice of P, R, N, E, and L by comparing fVCLK to fVRS and fVCLKDES. For proper
operation, fVCLK must be within the application’s tolerance of fVCLKDES, and fVRS must be as close
as possible to fVCLK.
NOTE
Exceeding the recommended maximum bus frequency or VCO frequency
can crash the MCU.
11. Program the PLL registers accordingly:
a. In the PRE bits of the PLL control register (PCTL), program the binary equivalent of P.
b. In the VPR bits of the PLL control register (PCTL), program the binary equivalent of E.
c. In the PLL multiplier select register low (PMSL) and the PLL multiplier select register high
(PMSH), program the binary equivalent of N.
d. In the PLL VCO range select register (PMRS), program the binary coded equivalent of L.
e. In the PLL reference divider select register (PMDS), program the binary coded equivalent
of R.
Table 4-1 provides numeric examples (numbers are in hexadecimal notation):
Table 4-1. Numeric Example
fBUS
2.0 MHz
2.4576 MHz
2.5 MHz
4.0 MHz
4.9152 MHz
5.0 MHz
7.3728 MHz
8.0 MHz
fRCLK
32.768 kHz
32.768 kHz
32.768 kHz
32.768 kHz
32.768 kHz
32.768 kHz
32.768 kHz
32.768 kHz
R
N
P
E
L
1
F5
0
0
D1
1
12C
0
1
80
1
132
0
1
83
1
1E9
0
1
D1
1
258
0
2
80
1
263
0
2
82
1
384
0
2
C0
1
3D1
0
2
D0
MC68HC908GR16 Data Sheet, Rev. 5.0
Freescale Semiconductor
65