MC68HC908GR16 Datasheet, PDF (41/276 Pages) Motorola, Inc – Microcontrollers

FLASH Memory (FLASH)
2.6.1.3 FLASH Mass Erase Operation
Use this step-by-step procedure to erase entire FLASH memory to read as a 1:
1. Set both the ERASE bit, and the MASS bit in the FLASH control register.
2. Read from the FLASH block protect register.
3. Write any data to any FLASH address⁽¹⁾ within the FLASH memory address range.
4. Wait for a time, t_NVS (minimum 10 μs)
5. Set the HVEN bit.
6. Wait for a time, t_MErase (minimum 4 ms)
7. Clear the ERASE and MASS bits.
8. Wait for a time, t_NVHL (minimum 100 μs)
9. Clear the HVEN bit.
10. After a time, t_RCV (minimum 1 μs), the memory can be accessed again in read mode.
NOTE
Mass erase is disabled whenever any block is protected (FLBPR does not
equal $FF).
Programming and erasing of FLASH locations cannot be performed by code being executed from FLASH
memory. While these operations must be performed in the order shown, other unrelated operations may
occur between the steps.
CAUTION
A mass erase will erase the internal oscillator trim value at $FFC0.
2.6.1.4 FLASH Program/Read Operation
Programming of the FLASH memory is done on a row basis. A row consists of 32 consecutive bytes
starting from addresses $XX00, $XX20, $XX40, $XX60, $XX80, $XXA0, $XXC0, or $XXE0. Use the
following step-by-step procedure to program a row of FLASH memory
Figure 2-4 shows a flowchart of the programming algorithm.
NOTE
Only bytes which are currently $FF may be programmed.
1. Set the PGM bit. This configures the memory for program operation and enables the latching of
address and data for programming.
2. Read from the FLASH block protect register.
3. Write any data to any FLASH address within the row address range desired.
4. Wait for a time, t_NVS (minimum 10 μs).
5. Set the HVEN bit.
6. Wait for a time, t_PGS (minimum 5 μs).
7. Write data to the FLASH address being programmed⁽²⁾.
1. When in monitor mode, with security sequence failed (see 19.3.2 Security), write to the FLASH block protect register instead
of any FLASH address.
2. The time between each FLASH address change, or the time between the last FLASH address programmed to clearing PGM
bit, must not exceed the maximum programming time, t_PROG maximum.
MC68HC908GR16 Data Sheet, Rev. 5.0
Freescale Semiconductor
41