MC68HC908GR16 Datasheet, PDF (42/276 Pages) Motorola, Inc – Microcontrollers

Memory
8. Wait for a time, t_PROG (minimum 30 μs).
9. Repeat step 7 and 8 until all desired bytes within the row are programmed.
10. Clear the PGM bit.⁽¹⁾
11. Wait for a time, t_NVH (minimum 5 μs).
12. Clear the HVEN bit.
13. After time, t_RCV (typical 1 μs), the memory can be accessed in read mode again.
NOTE
The COP register at location $FFFF should not be written between steps
5-12, when the HVEN bit is set. Since this register is located at a valid
FLASH address, unpredictable behavior may occur if this location is written
while HVEN is set.
This program sequence is repeated throughout the memory until all data is programmed.
NOTE
Programming and erasing of FLASH locations cannot be performed by
code being executed from the FLASH memory. While these operations
must be performed in the order shown, other unrelated operations may
occur between the steps. Do not exceed t_PROG maximum, see 20.15
Memory Characteristics.
It is highly recommended that interrupts be disabled during program/ erase
operations.
Do not exceed t_PROG maximum or t_HV maximum. t_HV is defined as the cumulative high voltage
programming time to the same row before next erase. t_HV must satisfy this condition:
t_NVX = t_NVH + t_PGS + (t_PROG x 32) <= t_HV maximum
Refer to 20.15 Memory Characteristics.
The time between programming the FLASH address change (step 7 to step 7), or the time between the
last FLASH programmed to clearing the PGM bit (step 7 to step 10) must not exceed the maximum
programming time, t_PROG maximum.
CAUTION
Be cautious when programming the FLASH array to ensure that
non-FLASH locations are not used as the address that is written to when
selecting either the desired row address range in step 3 of the algorithm or
the byte to be programmed in step 7 of the algorithm. This applies
particularly to $FFD4–$FFDF.
MC68HC908GR16 Data Sheet, Rev. 5.0
42
Freescale Semiconductor