MC68HC908GR16 Datasheet, PDF (4/276 Pages) Motorola, Inc – Microcontrollers

Revision History
Revision History (Continued)
Date
September,
2004
March,
2005
January,
2007
April,
2007
Revision
Level
2.0
3.0
4.0
5.o
Description
Figure 1-1. MCU Block Diagram — Removed data bus switch module
Figure 2-2. Control, Status, and Data Registers and Figure 5-1. Configuration
Register 2 (CONFIG2) — Changed name of bit 0 from SCIBDSRC to
ESCIBDSRC
14.8.8 ESCI Prescaler Register — Updated description in this subsection
14.9.1 ESCI Arbiter Control Register — Updated description of ACLK bit
14.9.3 Bit Time Measurement — Updated bit time measurement mode for
ACLK = 0
Added dc injection current values to:
20.5 5.0-Vdc Electrical Characteristics
20.6 3.3-Vdc Electrical Characteristics
20.9.1 CGM Component Specifications — Corrected series resistor values
20.15 Memory Characteristics — Table updated to reflect new values
10.5 Clock Generator Module (CGM) — Updated description to remove
erroneous information.
20.9 Clock Generation Module Characteristics — Updated to reflect correct
values.
Table 13-2. Interrupt Source Flags — Changed IF7 to TIM2 channel instead
of Reserved.
Table 2-1. Vector Addresses — Changed address $FFEE to TIM2 Channel 1
Vector (High) and $FFEF to TIM2 Channel 1 Vector (Low) from Reserved
Figure 2-2. Control, Status, and Data Registers — Changed addresses
$0033 to $0035 to show TIM2 Channel 1 registers.
Figure 2-2. Control, Status, and Data Registers — Replaced TMCLKSEL with
TMBCLKSEL to be compatile with development tool nomenclature
Chapter 5 Configuration Register (CONFIG) — Changed COPCLK to
CGMXCLK, replaced TMCLKSEL with TMBCLKSEL to be compatible with
development tool nomenclature, and replaced exponents for COP timeout
period
6.2 Functional Description — Replaced exponents for COP timeout period
10.6.2 Stop Mode — Changed COPCLK to CGMXCLK
Figure 14-2. ESCI Module Block Diagram — Replaced BUS_CLK with BUS
CLOCK and removed reference to rx BUSCLK
Figure 14-5. ESCI Transmitter and Figure 14-6. ESCI Receiver Block
Diagram — Added CGMXCLK OR to BUS CLOCK designator
14.8.7 ESCI Baud Rate Register — Replaced description of the LINT and
LINR bits
Figure 17-1 . Timebase Block Diagram and 17.5 TBM Interrupt Rate—
Replaced TBMCLKSEL with TMBCLKSEL to be compatible with
development tool nomenclature
Page
Number(s)
22
29
and
78
168
172
173
253
255
258
265
112
260
144
37
29
32
79
84
113
149
151
154
169
218
219
MC68HC908GR16 Data Sheet, Rev. 5.0
4
Freescale Semiconductor