MC68HC908GR16 Datasheet, PDF (238/276 Pages) Motorola, Inc – Microcontrollers

Development Support
ADDRESS BUS[15:8]
ADDRESS BUS[15:0]
BREAK ADDRESS REGISTER HIGH
8-BIT COMPARATOR
8-BIT COMPARATOR
BREAK ADDRESS REGISTER LOW
CONTROL
BKPT
(TO SIM)
ADDRESS BUS[7:0]
Figure 19-1. Break Module Block Diagram
Addr.
Register Name
$FE00
Break Status Register ^Read:
(BSR) Write:
See page 241. _Reset:
$FE02
Break Auxiliary Register ^Read:
(BRKAR) Write:
See page 240. _Reset:
$FE03
Break Flag Control ^Read:
Register (BFCR) Write:
See page 241. _Reset:
$FE09
Break Address High ^Read:
Register (BRKH) Write:
See page 240. _Reset:
$FE0A
Break Address Low ^Read:
Register (BRKL) Write:
See page 240. _Reset:
$FE0B
Break Status and Control ^Read:
Register (BRKSCR) Write:
See page 239. _Reset:
1. Writing a 0 clears SBSW.
Bit 7
R
Bit 7
0
BCFE
0
Bit15
0
Bit 7
0
BRKE
0
6
5
R
R
Bit 6
Bit 5
0
0
R
R
Bit14
Bit13
0
0
Bit 6
Bit 5
0
0
0
BRKA
0
0
= Unimplemented
4
3
2
1
Bit 0
SBSW
R
R
R
Note⁽¹⁾
R
0
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0
0
0
0
0
R
R
R
R
R
Bit12
Bit11
Bit10
Bit9
Bit8
0
0
0
0
0
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R = Reserved
Figure 19-2. Break I/O Register Summary
19.2.1.1 Flag Protection During Break Interrupts
The system integration module (SIM) controls whether or not module status bits can be cleared during
the break state. The BCFE bit in the break flag control register (BFCR) enables software to clear status
bits during the break state. See 15.7.3 Break Flag Control Register and the Break Interrupts subsection
for each module.
MC68HC908GR16 Data Sheet, Rev. 5.0
238
Freescale Semiconductor