MC9S08EL32 Datasheet, PDF (58/356 Pages) Freescale Semiconductor, Inc – 8-Bit HCS08 Central Processor Unit (CPU)

Chapter 4 Memory
4.5.11.3 FLASH and EEPROM Configuration Register (FCNFG)
7
6
5
4
3
2
1
0
R
0
0
0
0
0
0
EPGSEL KEYACC
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 4-7. FLASH and EEPROM Configuration Register (FCNFG)
Table 4-10. FCNFG Register Field Descriptions
Field
Description
6
EPGSEL
5
KEYACC
EEPROM Page Select — This bit selects which EEPROM page is accessed in the memory map.
0 Page 0 is in foreground of memory map. Page 1 is in background and can not be accessed.
1 Page 1 is in foreground of memory map. Page 0 is in background and can not be accessed.
Enable Writing of Access Key — This bit enables writing of the backdoor comparison key. For more detailed
information about the backdoor key mechanism, refer to Section 4.5.9, “Security.”
0 Writes to 0xFFB0–0xFFB7 are interpreted as the start of a FLASH programming or erase command.
1 Writes to NVBACKKEY (0xFFB0–0xFFB7) are interpreted as comparison key writes.
MC9S08EL32 Series and MC9S08SL16 Series Data Sheet, Rev. 3
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Freescale Semiconductor