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MC9S08EL32 Datasheet, PDF (27/356 Pages) Freescale Semiconductor, Inc – 8-Bit HCS08 Central Processor Unit (CPU)
Chapter 2 Pins and Connections
2.2.2 Oscillator
Immediately after reset, the MCU uses an internally generated clock provided by the clock source
generator (ICS) module. This internal clock source is used during reset startup and can be enabled as the
clock source for stop recovery to avoid the need for a long crystal startup delay. For more information on
the ICS, see Chapter 8, “Internal Clock Source (S08ICSV2).”
The oscillator (XOSC) in this MCU is a Pierce oscillator that can accommodate a crystal or ceramic
resonator. Rather than a crystal or ceramic resonator, an external oscillator can be connected to the EXTAL
input pin.
Refer to Figure 2-3 for the following discussion. RS (when used) and RF should be low-inductance
resistors such as carbon composition resistors. Wire-wound resistors, and some metal film resistors, have
too much inductance. C1 and C2 normally should be high-quality ceramic capacitors that are specifically
designed for high-frequency applications.
RF is used to provide a bias path to keep the EXTAL input in its linear range during crystal startup; its value
is not generally critical. Typical systems use 1 MΩ to 10 MΩ. Higher values are sensitive to humidity and
lower values reduce gain and (in extreme cases) could prevent startup.
C1 and C2 are typically in the 5-pF to 25-pF range and are chosen to match the requirements of a specific
crystal or resonator. Be sure to take into account printed circuit board (PCB) capacitance and MCU pin
capacitance when selecting C1 and C2. The crystal manufacturer typically specifies a load capacitance
which is the series combination of C1 and C2 (which are usually the same size). As a first-order
approximation, use 10 pF as an estimate of combined pin and PCB capacitance for each oscillator pin
(EXTAL and XTAL).
2.2.3 RESET
RESET is a dedicated pin with a built in pull-up device. It has input hysteresis and an open drain output.
Since the pin does not have a clamp diode to VDD, it should not be driven above VDD. Internal power-on
reset and low-voltage reset circuitry typically make external reset circuitry unnecessary. This pin is
normally connected to the standard 6-pin background debug connector so a development system can
directly reset the MCU system. If desired, a manual external reset can be added by supplying a simple
switch to ground (pull reset pin low to force a reset).
Whenever any reset is initiated (whether from an external signal or from an internal system), the RESET
pin is driven low for about 66 bus cycles. The reset circuitry decodes the cause of reset and records it by
setting a corresponding bit in the system reset status register (SRS).
NOTE
This pin does not contain a clamp diode to VDD and should not be driven
above VDD. The voltage measured on the internally-pulled-up RESET pin
is not pulled to VDD. The internal gates connected to this pin are pulled to
VDD. If the RESET pin is required to drive to a VDD level, use an external
pullup.
MC9S08EL32 Series and MC9S08SL16 Series Data Sheet, Rev. 3
Freescale Semiconductor
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