MC9S08EL32 Datasheet, PDF (14/356 Pages) Freescale Semiconductor, Inc – 8-Bit HCS08 Central Processor Unit (CPU)

Section Number
Title
Page
11.6 Interrupts .......................................................................................................................................179
11.6.1 Byte Transfer Interrupt ....................................................................................................179
11.6.2 Address Detect Interrupt .................................................................................................180
11.6.3 Arbitration Lost Interrupt ................................................................................................180
11.7 Initialization/Application Information ..........................................................................................181
Chapter 12
Slave LIN Interface Controller (S08SLICV1)
12.1 Introduction ...................................................................................................................................185
12.1.1 Features ...........................................................................................................................187
12.1.2 Modes of Operation ........................................................................................................188
12.1.3 Block Diagram ................................................................................................................191
12.2 External Signal Description ..........................................................................................................191
12.2.1 SLCTx — SLIC Transmit Pin ........................................................................................191
12.2.2 SLCRx — SLIC Receive Pin ..........................................................................................191
12.3 Register Definition ........................................................................................................................191
12.3.1 SLIC Control Register 1 (SLCC1) ..................................................................................191
12.3.2 SLIC Control Register 2 (SLCC2) ..................................................................................193
12.3.3 SLIC Bit Time Registers (SLCBTH, SLCBTL) .............................................................195
12.3.4 SLIC Status Register (SLCS) ..........................................................................................196
12.3.5 SLIC State Vector Register (SLCSV) .............................................................................197
12.3.6 SLIC Data Length Code Register (SLCDLC) ................................................................202
12.3.7 SLIC Identifier and Data Registers (SLCID, SLCD7-SLCD0) ......................................203
12.4 Functional Description ..................................................................................................................204
12.5 Interrupts .......................................................................................................................................204
12.5.1 SLIC During Break Interrupts ........................................................................................204
12.6 Initialization/Application Information ..........................................................................................204
12.6.1 LIN Message Frame Header ...........................................................................................205
12.6.2 LIN Data Field ................................................................................................................205
12.6.3 LIN Checksum Field .......................................................................................................206
12.6.4 SLIC Module Constraints ...............................................................................................206
12.6.5 SLCSV Interrupt Handling .............................................................................................206
12.6.6 SLIC Module Initialization Procedure ............................................................................206
12.6.7 Handling LIN Message Headers .....................................................................................208
12.6.8 Handling Command Message Frames ............................................................................211
12.6.9 Handling Request LIN Message Frames ........................................................................214
12.6.10Handling IMSG to Minimize Interrupts .........................................................................218
12.6.11Sleep and Wakeup Operation ..........................................................................................219
12.6.12Polling Operation ............................................................................................................219
12.6.13LIN Data Integrity Checking Methods ...........................................................................219
12.6.14High-Speed LIN Operation .............................................................................................220
12.6.15Bit Error Detection and Physical Layer Delay ...............................................................223
MC9S08EL32 Series and MC9S08SL16 Series Data Sheet, Rev. 3
14
Freescale Semiconductor