MC9S08EL32 Datasheet, PDF (196/356 Pages) Freescale Semiconductor, Inc – 8-Bit HCS08 Central Processor Unit (CPU)

7
6
5
4
3
2
1
0
R
0
0
I3
I2
I1
I0
0
0
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 12-9. SLIC State Vector Register (SLCSV)
Table 12-7. SLCSV Field Descriptions
Field
5:2
I[3:0]
Description
Interrupt State Vector — These bits indicate the source of the interrupt request that is currently pending.
READ: any time
WRITE: ignored
12.3.5.1 LIN Mode Operation
Table 12-8 shows the possible values for the possible sources for a SLIC interrupt while in LIN mode
operation (BTM = 0).
Table 12-8. Interrupt Sources Summary (BTM = 0)
SLCSV
0x00
0x04
0x08
0x0C
0x10
0x14
0x18
0x1C
0x20
0x24
0x28
0x2C
0x30
0x34
0x38
0x3C
I3 I2 I1 I0
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
Interrupt Source
No Interrupts Pending
No-Bus-Activity
TX Message Buffer Empty
Checksum Transmitted
TX Message Buffer Empty
RX Message Buffer Full
Checksum OK
RX Data Buffer Full
No Errors
Bit-Error
Receiver Buffer Overrun
Reserved
Checksum Error
Byte Framing Error
Identifier Received Successfully
Identifier Parity Error
Reserved
Reserved
Wakeup
Priority
0 (Lowest)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15 (Highest)
MC9S08EL32 Series and MC9S08SL16 Series Data Sheet, Rev. 3
198
Freescale Semiconductor