MC9S08EL32 Datasheet, PDF (110/356 Pages) Freescale Semiconductor, Inc – 8-Bit HCS08 Central Processor Unit (CPU)

Chapter 7 Central Processor Unit (S08CPUV3)
Source
Form
STX opr8a
STX opr16a
STX oprx16,X
STX oprx8,X
STX ,X
STX oprx16,SP
STX oprx8,SP
SUB #opr8i
SUB opr8a
SUB opr16a
SUB oprx16,X
SUB oprx8,X
SUB ,X
SUB oprx16,SP
SUB oprx8,SP
SWI
TAP
TAX
TPA
TST opr8a
TSTA
TSTX
TST oprx8,X
TST ,X
TST oprx8,SP
TSX
TXA
Table 7-2. Instruction Set Summary (Sheet 8 of 9)
Operation
DIR
EXT
Store X (Low 8 Bits of Index Register)
IX2
in Memory
IX1
M ← (X)
IX
SP2
SP1
IMM
DIR
EXT
Subtract
IX2
A ← (A) – (M)
IX1
IX
SP2
SP1
Software Interrupt
PC ← (PC) + $0001
Push (PCL); SP ← (SP) – $0001
Push (PCH); SP ← (SP) – $0001
Push (X); SP ← (SP) – $0001
Push (A); SP ← (SP) – $0001
INH
Push (CCR); SP ← (SP) – $0001
I ← 1;
PCH ← Interrupt Vector High Byte
PCL ← Interrupt Vector Low Byte
Transfer Accumulator to CCR
CCR ← (A)
INH
Transfer Accumulator to X (Index Register
Low)
INH
X ← (A)
Transfer CCR to Accumulator
A ← (CCR)
INH
Test for Negative or Zero (M) – $00
DIR
(A) – $00
INH
(X) – $00
INH
(M) – $00
IX1
(M) – $00
IX
(M) – $00
SP1
Transfer SP to Index Reg.
H:X ← (SP) + $0001
INH
Transfer X (Index Reg. Low) to Accumulator
A ← (X)
INH
Object Code
BF dd
CF hh ll
DF ee ff
EF ff
FF
9E DF ee ff
9E EF ff
A0 ii
B0 dd
C0 hh ll
D0 ee ff
E0 ff
F0
9E D0 ee ff
9E E0 ff
Cyc-by-Cyc
Details
Affect
on CCR
V11H INZC
3 wpp
4 pwpp
4 pwpp
3 wpp
2 wp
5 ppwpp
4 pwpp
011– ––
2 pp
3 rpp
4 prpp
4 prpp
3 rpp
3 rfp
5 pprpp
4 prpp
11– –
83
11 sssssvvfppp – 1 1 – 1 – – –
84
97
85
3D dd
4D
5D
6D ff
7D
9E 6D ff
95
9F
1p
1p
1p
4 rfpp
1p
1p
4 rfpp
3 rfp
5 prfpp
2 fp
1p
11 
–11– ––––
–11– ––––
011– ––
–11– ––––
–11– ––––
MC9S08EL32 Series and MC9S08SL16 Series Data Sheet, Rev. 3
110
Freescale Semiconductor