MC9S08EL32 Datasheet, PDF (197/356 Pages) Freescale Semiconductor, Inc – 8-Bit HCS08 Central Processor Unit (CPU)

• No Interrupts Pending
This value indicates that all pending interrupt sources have been serviced. In polling mode, the
SLCSV is read and interrupts serviced until this value reads back 0. This source will not generate
an interrupt of the CPU, regardless of state of SLCIE.
• No Bus Activity (LIN specified error)
The No-Bus-Activity condition occurs if no valid SYNCH BREAK FIELD or BYTE FIELD was
received for more than 2²³ SLIC clock counts since the reception of the last valid message. For
example, with 10 MHz SLIC clock frequency, a No-Bus-Activity interrupt will occur
approximately 0.839 seconds after the bus begins to idle.
• TX Message Buffer Empty — Checksum Transmitted
When the entire LIN message frame has been transmitted successfully, complete with the
appropriately selected checksum byte, this interrupt source is asserted. This source is used for all
standard LIN message frames and the final set of bytes with extended LIN message frames.
• TX Message Buffer Empty
This interrupt source indicates that all 8 bytes in the LIN message buffer have been transmitted
with no checksum appended. This source is used for intermediate sets of 8 bytes in extended LIN
message frames.
• RX Message Buffer Full — Checksum OK
When the entire LIN message frame has been received successfully, complete with the
appropriately selected checksum byte, and the checksum calculates correctly, this interrupt source
is asserted. This source is used for all standard LIN message frames and the final set of bytes with
extended LIN message frames. To clear this source, SLCD0 must be read first.
• RX Data Buffer Full — No Errors
This interrupt source indicates that 8 bytes have been received with no checksum byte and are
waiting in the LIN message buffer. This source is used for intermediate sets of 8 bytes in extended
LIN message frames. To clear this source, SLCD0 must be read first.
• Bit Error
A unit that is sending a bit on the bus also monitors the bus. A BIT_ERROR must be detected at
that bit time, when the bit value that is monitored is different from the bit value that is sent. The
SLIC will terminate the data transmission upon detection of a bit error, according to the LIN
specification. Bit errors are not checked when the LIN bus is running at high speed due to the
effects of physical layer round trip delay. Bit errors are checked only when BEDD = 0.
• Receiver Buffer Overrun Error
This error is an indication that the receive buffer has not been emptied and additional bytes have
been received, resulting in lost data. Because this interrupt is higher priority than the receive buffer
full interrupts, it will appear first when an overflow condition occurs. There will, however, be a
pending receive interrupt which must also be cleared after the buffer overrun flag is cleared. Buffer
overrun errors can be avoided if on reception of data complete with checksum correct
(SLCSV=$10) SLCD0 is read, the software sets IMSG after reception of a valid ID, the software
enters BTM mode, or received data causes a framing or checksum error to occur.
• Checksum Error (LIN specified error)
The checksum error occurs when the calculated checksum value does not match the expected
value. If this error is encountered, it is important to verify that the correct checksum calculation
MC9S08EL32 Series and MC9S08SL16 Series Data Sheet, Rev. 3
Freescale Semiconductor
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