MC9S08EL32 Datasheet, PDF (109/356 Pages) Freescale Semiconductor, Inc – 8-Bit HCS08 Central Processor Unit (CPU)

Source
Form
ROL opr8a
ROLA
ROLX
ROL oprx8,X
ROL ,X
ROL oprx8,SP
ROR opr8a
RORA
RORX
ROR oprx8,X
ROR ,X
ROR oprx8,SP
RSP
RTI
RTS
SBC #opr8i
SBC opr8a
SBC opr16a
SBC oprx16,X
SBC oprx8,X
SBC ,X
SBC oprx16,SP
SBC oprx8,SP
SEC
SEI
STA opr8a
STA opr16a
STA oprx16,X
STA oprx8,X
STA ,X
STA oprx16,SP
STA oprx8,SP
STHX opr8a
STHX opr16a
STHX oprx8,SP
STOP
Chapter 7 Central Processor Unit (S08CPUV3)
Table 7-2. Instruction Set Summary (Sheet 7 of 9)
Operation
Rotate Left through Carry
C
b7
b0
Rotate Right through Carry
C
b7
b0
Reset Stack Pointer (Low Byte)
SPL ← $FF
(High Byte Not Affected)
Return from Interrupt
SP ← (SP) + $0001; Pull (CCR)
SP ← (SP) + $0001; Pull (A)
SP ← (SP) + $0001; Pull (X)
SP ← (SP) + $0001; Pull (PCH)
SP ← (SP) + $0001; Pull (PCL)
Return from Subroutine
SP ← SP + $0001; Pull (PCH)
SP ← SP + $0001; Pull (PCL)
Subtract with Carry
A ← (A) – (M) – (C)
Set Carry Bit
(C ← 1)
Set Interrupt Mask Bit
(I ← 1)
Store Accumulator in Memory
M ← (A)
Store H:X (Index Reg.)
(M:M + $0001) ← (H:X)
Enable Interrupts: Stop Processing
Refer to MCU Documentation
I bit ← 0; Stop Processing
Object Code
Cyc-by-Cyc
Details
Affect
on CCR
V11H INZC
DIR
39 dd
5 rfwpp
INH
49
1p
INH
59
1p
IX1
69 ff
5 rfwpp
IX
79
4 rfwp
SP1
9E 69 ff
6 prfwpp
11– –
DIR
36 dd
5 rfwpp
INH
46
1p
INH
56
1p
IX1
66 ff
5 rfwpp
IX
76
4 rfwp
SP1
9E 66 ff
6 prfwpp
11– –
INH
9C
1p
–11– ––––
INH
80
9 uuuuufppp
11 
INH
81
5 ufppp
IMM
A2 ii
2 pp
DIR
B2 dd
3 rpp
EXT
C2 hh ll 4 prpp
IX2
D2 ee ff 4 prpp
IX1
E2 ff
3 rpp
IX
F2
3 rfp
SP2
9E D2 ee ff 5 pprpp
SP1
9E E2 ff
4 prpp
INH
99
1p
INH
9B
1p
DIR
B7 dd
3 wpp
EXT
C7 hh ll 4 pwpp
IX2
D7 ee ff 4 pwpp
IX1
E7 ff
3 wpp
IX
F7
2 wp
SP2
9E D7 ee ff 5 ppwpp
SP1
9E E7 ff
4 pwpp
DIR
35 dd
4 wwpp
EXT
96 hh ll 5 pwwpp
SP1
9E FF ff
5 pwwpp
INH
8E
2 fp...
–11– ––––
11– –
–11– –––1
–11– 1–––
011– ––
011– ––
–11– 0–––
MC9S08EL32 Series and MC9S08SL16 Series Data Sheet, Rev. 3
Freescale Semiconductor
109