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MC9S12XD64MAA Datasheet, PDF (52/1348 Pages) Freescale Semiconductor, Inc – ATD Input Enable Register 0 | |||
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Chapter 1 Device Overview MC9S12XD-Family
1.2.2 Signal Properties Summary
Table 1-7 summarizes the pin functionality of the MC9S12XDP512. For available modules on other parts
of the S12XD, S12XB and S12XA family please refer to Appendix E Derivative Differences.
Table 1-7. Signal Properties Summary (Sheet 1 of 4)
Pin
Name
Function 1
Pin
Name
Function 2
Pin
Name
Function 3
Pin
Name
Function 4
Pin
Name
Function 5
Power
Supply
Internal Pull
Resistor
CTRL
Reset
State
Description
EXTAL
â
â
â
â
VDDPLL
NA
NA Oscillator pins
XTAL
â
â
â
â
VDDPLL
NA
NA
RESET
â
â
â
â
VDDR
PULLUP
External reset
TEST
â
â
â
â
N.A. RESET pin DOWN Test input
VREGEN
â
â
â
â
VDDX
PUCR
Up Voltage regulator enable
Input
XFC
â
â
â
â
VDDPLL
NA
NA PLL loop ï¬lter
BKGD
MODC
â
â
â
VDDX Always on
Up Background debug
PAD[23:08] AN[23:8]
â
â
â
VDDA
PER0/ Disabled Port AD I/O, Port AD inputs
PER1
of ATD1 and
analog inputs of ATD1
PAD[07:00] AN[7:0]
â
â
â
VDDA
PER1 Disabled Port AD I/O, Port AD inputs
of ATD0 and
analog inputs of ATD0
PA[7:0]
â
â
â
PB[7:0]
â
â
â
PA[7:0] ADDR[15:8] IVD[15:8]
â
â
VDDR
PUCR Disabled Port A I/O
â
VDDR
PUCR Disabled Port BI/O
â
VDDR
PUCR Disabled Port A I/O, address bus,
internal visibility data
PB[7:1] ADDR[7:1] IVD[7:0]
â
â
VDDR
PUCR Disabled Port B I/O, address bus,
internal visibility data
PB0
ADDR0
UDS
VDDR
PUCR
Disabled Port B I/O, address bus,
upper data strobe
PC[7:0] DATA[15:8]
â
â
PD[7:0] DATA[7:0]
â
â
PE7
ECLKX2 XCLKS
â
â
VDDR
PUCR Disabled Port C I/O, data bus
â
VDDR
PUCR Disabled Port D I/O, data bus
â
VDDR
PUCR
Up Port E I/O, system clock
output, clock select
PE6
TAGHI
MODB
â
â
VDDR
While RESET
Port E I/O, tag high, mode
pin is low: down input
PE5
RE
MODA TAGLO
â
VDDR
While RESET
Port E I/O, read enable,
pin is low: down mode input, tag low input
PE4
ECLK
â
â
â
VDDR
PUCR
PE3
LSTRB
LDS EROMCTL
â
VDDR
PUCR
Up Port E I/O, bus clock output
Up Port E I/O, low byte data
strobe, EROMON control
PE2
R/W
WE
â
PE1
IRQ
â
â
â
VDDR
PUCR
â
VDDR
PUCR
Up Port E I/O, read/write
Up Port E Input, maskable
interrupt
MC9S12XDP512 Data Sheet, Rev. 2.21
52
Freescale Semiconductor
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