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MC9S12XD64MAA Datasheet, PDF (1251/1348 Pages) Freescale Semiconductor, Inc – ATD Input Enable Register 0 | |||
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Appendix A Electrical Characteristics
A.2 ATD Characteristics
This section describes the characteristics of the analog-to-digital converter.
A.2.1 ATD Operating Characteristics
The Table A-12 and Table A-13 show conditions under which the ATD operates.
The following constraints exist to obtain full-scale, full range results:
VSSA ⤠VRL ⤠VIN ⤠VRH ⤠VDDA.
This constraint exists since the sample buffer ampliï¬er can not drive beyond the power supply levels that
it ties to. If the input level goes outside of this range it will effectively be clipped.
Table A-12. ATD 5-V Operating Characteristics
Conditions are shown in Table A-4 unless otherwise noted, supply voltage 4.5 V < VDDA < 5.5 V
Num C
Rating
Symbol
Min
Typ
Max
Unit
1 D Reference potential
Low
High
2 C Differential reference voltage1
VRL
VSSA
â
VDDA/2
V
VRH
VDDA/2
â
VDDA
V
VRH-VRL
4.50
5.00
5.5
V
3 D ATD clock frequency
fATDCLK
0.5
2.0
MHz
4 D ATD 10-bit conversion period
Clock cycles2
Conv, time at 2.0 MHz ATD clock fATDCLK
NCONV10
14
â
28
Cycles
TCONV10
7
â
14
µs
5 D ATD 8-Bit conversion period
Clock cycles2
Conv, time at 2.0 MHz ATD clock fATDCLK
NCONV8
12
â
26
Cycles
TCONV8
6
â
13
µs
6 D Recovery time (VDDA = 5.0 Volts)
tREC
â
â
20
µs
7 P Reference supply current 2 ATD blocks on
IREF
â
â
0.750
mA
8 P Reference supply current 1 ATD block on
IREF
â
â
0.375
mA
1 Full accuracy is not guaranteed when differential voltage is less than 4.50 V
2 The minimum time assumes a ï¬nal sample period of 2 ATD clocks cycles while the maximum time assumes a ï¬nal sample
period of 16 ATD clocks.
Freescale Semiconductor
MC9S12XDP512 Data Sheet, Rev. 2.21
1253
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