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MC9S12XD64MAA Datasheet, PDF (360/1348 Pages) Freescale Semiconductor, Inc – ATD Input Enable Register 0 | |||
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Chapter 7 Enhanced Capture Timer (S12ECT16B8CV2)
7.4.1.5 Precision Timer
By enabling the PRNT bit of the TSCR1 register, the performance of the timer can be enhanced. In this
case, it is possible to set additional prescaler settings for the main timer counter and modulus down counter
and enhance delay counter settings compared to the settings in the present ECT timer.
7.4.1.6 Flag Clearing Mechanisms
The ï¬ags in the ECT can be cleared one of two ways:
1. Normal ï¬ag clearing mechanism (TFFCA = 0)
Any of the ECT ï¬ags can be cleared by writing a one to the ï¬ag.
2. Fast ï¬ag clearing mechanism (TFFCA = 1)
With the timer fast ï¬ag clear all (TFFCA) enabled, the ECT ï¬ags can only be cleared by accessing
the various registers associated with the ECT modes of operation as described below. The ï¬ags
cannot be cleared via the normal ï¬ag clearing mechanism. This fast ï¬ag clearing mechanism has
the advantage of eliminating the software overhead required by a separate clear sequence. Extra
care must be taken to avoid accidental ï¬ag clearing due to unintended accesses.
â Input capture
A read from an input capture channel register causes the corresponding channel ï¬ag, CxF, to
be cleared in the TFLG1 register.
â Output compare
A write to the output compare channel register causes the corresponding channel flag, CxF, to
be cleared in the TFLG1 register.
â Timer counter
Any access to the TCNT register clears the TOF flag in the TFLG2 register.
â Pulse accumulator A
Any access to the PACN3 and PACN2 registers clears the PAOVF and PAIF flags in the
PAFLG register.
â Pulse accumulator B
Any access to the PACN1 and PACN0 registers clears the PBOVF flag in the PBFLG register.
â Modulus down counter
Any access to the MCCNT register clears the MCZF flag in the MCFLG register.
7.4.2 Reset
The reset state of each individual bit is listed within the register description section (Section 7.3, âMemory
Map and Register Deï¬nitionâ) which details the registers and their bit-ï¬elds.
MC9S12XDP512 Data Sheet, Rev. 2.21
360
Freescale Semiconductor
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