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F85226 Datasheet, PDF (3/44 Pages) Feature Integration Technology Inc. – LPC to ISA Bridge | |||
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Fintek
Feature Integration Technology Inc.
F85226
Table of Contents
1. General Description.............................................................................................................. 1
2. Features ............................................................................................................................... 1
3. Key Specifications ................................................................................................................ 1
4. Block Diagram ...................................................................................................................... 2
5. Pin Configuration .................................................................................................................. 3
6. Pin Descriptions.................................................................................................................... 3
6.1 Power Pin ....................................................................................................................... 4
6.2 Power on strapping signal .............................................................................................. 4
6.3 LPC interface .................................................................................................................. 4
6.4 ISA interface ................................................................................................................... 5
7. Function Description ........................................................................................................... 10
7.1 LPC interface: ............................................................................................................... 10
7.1.1 IO/Memory Read and Write Cycles ........................................................................... 12
7.1.2 DMA Read and Write Cycles ..................................................................................... 12
7.1.3 Booting Memory Read and Write Cycles ................................................................... 12
7.2 Serialized Interrupt........................................................................................................ 13
7.3 LPC DMA...................................................................................................................... 14
8. Registers Description ......................................................................................................... 15
8.1 Entry Key. ..................................................................................................................... 15
8.2 Configuration and Control Register â Index 03h ........................................................... 15
8.3 GPIO1 Function Select Register â Index 04h ............................................................... 16
8.4 GPIO2 Function Select Register â Index 05h ............................................................... 17
8.5 System Clock Register â Index 06h.............................................................................. 17
8.6 System Power down Register â Index 10h ................................................................... 18
8.7 GPIO Port Define Register (Low byte)â Index 11h ....................................................... 18
8.8 GPIO Port Define Register (High byte)â Index 12h ...................................................... 19
8.9 Address Decoder Register (I) â Index 013h.................................................................. 19
8.10 Address Decoder Register (II) â Index 014h............................................................... 20
8.11 GPIO Input Control Register â Index 15h.................................................................... 20
8.12 GPIO Output Data Register â Index 16h..................................................................... 21
8.13 GPIO1x Input Register â Index 17h ............................................................................ 21
8.14 GPIO2 Input Control Register â Index 18h ................................................................. 22
8.15 GPIO2 Output Data Register â Index 19h................................................................... 22
8.16 GPIO2 Input Register â Index 1Ah ............................................................................. 23
8.17 LED & IRQIN Control Register â Index 1Bh ............................................................... 23
F85226
II
July, 2007
V0.25P
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