F85226 Datasheet, PDF (27/44 Pages) Feature Integration Technology Inc. – LPC to ISA Bridge

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Feature Integration Technology Inc.
6 GP16_ST
5 GP15_ST
4 GP14_ST
3 GP13_ST
2 GP12_ST
1 GP11_ST
0 GP10_ST
F85226
RO VDD3V This bit is read only, when read back is the status of the pin GP16.
RO VDD3V This bit is read only, when read back is the status of the pin GP15.
RO VDD3V This bit is read only, when read back is the status of the pin GP14.
RO VDD3V This bit is read only, when read back is the status of the pin GP13.
RO VDD3V This bit is read only, when read back is the status of the pin GP12.
RO VDD3V This bit is read only, when read back is the status of the pin GP11.
RO VDD3V This bit is read only, when read back is the status of the pin GP10.
8.14 GPIO2 Input Control Register – Index 18h
Power-on default [7:0] =0000_0000b
Bit
Name
R/W PWR
Description
7 Reserved
-
-
Reserved.
GP23_OCTRL
3
GP23 in/out mode select: GP23 is input mode if set to 0. GP23 is output mode if set to 1.
R/W VDD3V
(If GPIO no enable “CR10 bit0”, This register will read only).
GP22_OCTRL
2
GP22 in/out mode select: GP22 is input mode if set to 0. GP22 is output mode if set to 1.
R/W VDD3V
(If GPIO no enable “CR10 bit0”, This register will read only).
GP21_OCTRL
1
GP21 in/out mode select: GP21 is input mode if set to 0. GP21 is output mode if set to 1.
R/W VDD3V
(If GPIO no enable “CR10 bit0”, This register will read only).
GP20_OCTRL
0
GP20 in/out mode select: GP20 is input mode if set to 0. GP20 is output mode if set to 1.
R/W VDD3V
(If GPIO no enable “CR10 bit0”, This register will read only).
8.15 GPIO2 Output Data Register – Index 19h
Power-on default [7:0] =0000_0000b
Bit
Name
R/W PWR
Description
7 Reserved
R/W VDD3V Reserved
GP23_DATA
3
When GP23 in out mode, set this bit to write data to pin GP23. (If GPIO no enable
R/W VDD3V
“CR10 bit0”, This register will read only).
GP22_DATA
2
When GP22 in out mode, set this bit to write data to pin GP22. (If GPIO no enable
R/W VDD3V
“CR10 bit0”, This register will read only).
GP21_DATA
1
When GP21 in out mode, set this bit to write data to pin GP21. (If GPIO no enable
R/W VDD3V
“CR10 bit0”, This register will read only).
GP20_DATA
0
When GP20 in out mode, set this bit to write data to pin GP20. (If GPIO no enable
R/W VDD3V
“CR10 bit0”, This register will read only).
F85226
22
July, 2007
V0.25P