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F85226 Datasheet, PDF (12/44 Pages) Feature Integration Technology Inc. – LPC to ISA Bridge
Fintek
Feature Integration Technology Inc.
123 MASTER#
98 IRQ3
INts
(5V-tolerance)
INts
(5V-tolerance)
VDD3v
F85226
The MASTER# input asserted indicates an ISA bus master is
driving the ISA bus. This signal is executed with DREQ line by an
ISA master to gain control of the ISA Bus.
VDD3v Parallel Interrupt Requested Input 3.
97 IRQ4
INts
(5V-tolerance)
VDD3v Parallel Interrupt Requested Input 4.
96 IRQ5
INts
(5V-tolerance)
VDD3v Parallel Interrupt Requested Input 5.
94 IRQ6
INts
(5V-tolerance)
VDD3v Parallel Interrupt Requested Input 6.
93 IRQ7
INts
(5V-tolerance)
VDD3v Parallel Interrupt Requested Input 7.
78 IRQ9
INts
(5V-tolerance)
VDD3v Parallel Interrupt Requested Input 9.
10 IRQ10
INts
(5V-tolerance)
VDD3v Parallel Interrupt Requested Input 10.
9
IRQ11
INts
(5V-tolerance)
VDD3v Parallel Interrupt Requested Input 11.
8
IRQ12
INts
(5V-tolerance)
VDD3v Parallel Interrupt Requested Input 12.
6
IRQ14
INts
(5V-tolerance)
VDD3v Parallel Interrupt Requested Input 14.
7
IRQ15
3
DRQ0
90 DRQ1
INts
(5V-tolerance)
INts
(5V-tolerance)
INts
(5V-tolerance)
VDD3v Parallel Interrupt Requested Input 15.
VDD3v
DMA Request input 0. The DREQ asserted indicates that either a
slave DMA device is requesting DMA services or an ISA bus
master is requesting to use the ISA bus.
VDD3v DMA Request input 1.
79 DRQ2
INts
(5V-tolerance)
VDD3v DMA Request input 2.
88 DRQ3
INts
(5V-tolerance)
VDD3v DMA Request input 3.
1
DRQ5
INts
(5V-tolerance)
VDD3v DMA Request input 5.
F85226
7
July, 2007
V0.25P