F85226 Datasheet, PDF (13/44 Pages) Feature Integration Technology Inc. – LPC to ISA Bridge

Fintek
Feature Integration Technology Inc.
127 DRQ6
IN_ts
(5V-tolerance)
VDD3v DMA Request input 6.
F85226
124 DRQ7
4
DACK0#
89 DACK1#
IN_ts
(5V-tolerance)
O₂₄
(5V-tolerance)
O₂₄
(5V-tolerance)
VDD3v DMA Request input 7.
VDD3v
DMA Acknowledge channel 0. The DACK# outputs asserted
indicates that either a DMA channel or an ISA bus master has
been granted the ISA bus.
VDD3v DMA Acknowledge channel 1.
99 DACK2#
O₂₄
(5V-tolerance)
VDD3v DMA Acknowledge channel 2.
87 DACK3#
O₂₄
(5V-tolerance)
VDD3v DMA Acknowledge channel 3.
DACK5#
2
EN_GP2X
DACK6#
128
HERFRA
DACK7#
126
RTCEN#
100 TC
80PCS#
36
KBEN#
37 ROMCS#
I/O_{24ts_u100k}
(5V-tolerance)
DMA Acknowledge channel 5.
VDD3v
During power-on strapping with external pulled-down 10k resistor.
Then it will disable LA [19:17] function and pin108~pin111, pin29
use as GPIO2X function.
DMA Acknowledge channel 6.
I/O_{24ts_u100k}
(5V-tolerance)
VDD3v
During power-on reset, this pin is pulled-up internally(Select
4Eh) ,and is defined as HEFRAS which provides the power-on
value for CR3 bit4 .A 10k ohm is recommended if intends to pull
down .(Select 2Eh)
I/O_{24ts_u100k}
(5V-tolerance)
O₂₄
(5V-tolerance)
VDD3v
DMA Acknowledge channel 7.
RTC Function Enable. The pin applies a pull-down resistor (4.7K
ohm) to enable RTC functions (RTCCS#, and IRQ8)
Terminal Count. TC signals the final data transfer of a DMA
VDD3v
transfer.
I/OD_{24ts_u100k}
(5V-tolerance)
I/O_24ts
(5V-tolerance)
VDD3v
80h PORT Chip Select.(Default)
Only decode IO address port 80h and must apply with IOW#.
K/B Functions Enable. During power-on reset this pin is weak
pulled-up internally. The pin applied a pull-down resistor (10K
ohm) to enable K/B functions. (IRQ1,KBCS#,and MCCS#)
ROMCS#, this pin enable positive decoder of BIOS address
VDD3v
range.
F85226
8
July, 2007
V0.25P