F85226 Datasheet, PDF (25/44 Pages) Feature Integration Technology Inc. – LPC to ISA Bridge

Fintek
Feature Integration Technology Inc.
F85226
1001: if decode_sel1 set to 0x9h the GPCS1 will output from pin GP21.
1010: if decode_sel1 set to 0xAh the GPCS1 will output from pin GP22.
1011: if decode_sel1 set to 0xBh the GPCS1 will output from pin GP23.
default: disable.
8.10 Address Decoder Register (II) – Index 014h
Power-on default [7:0] =1111_1111b
Bit
Name
R/W PWR
Description
7-4 DECODER_SEL4 R/W
3-0 DECODER_SEL3 R/W
VDD3V
VDD3V
Select GPIO pin to be GPCS3# that define decode address by CR31, 32. (If GPIO
no enable “CR10 bit0”, This register will read only).
0000: if decode_sel4 set to 0x0h the GPCS4 will output from pin GP10.
0011: if decode_sel4 set to 0x3h the GPCS4 will output from pin GP13.
0100: if decode_sel4 set to 0x4h the GPCS4 will output from pin GP14.
0101: if decode_sel4 set to 0x5h the GPCS4 will output from pin GP15.
1000: if decode_sel4 set to 0x8h the GPCS4 will output from pin GP20.
1001: if decode_sel4 set to 0x9h the GPCS4 will output from pin GP21.
1010: if decode_sel4 set to 0xAh the GPCS4 will output from pin GP22.
1011: if decode_sel4 set to 0xBh the GPCS4 will output from pin GP23.
default: disable.
Select GPIO pin to be GPCS3# that define decode address by CR34, 35. (If GPIO
no enable “CR10 bit0”, This register will read only).
0000: if decode_sel3 set to 0x0h the GPCS3 will output from pin GP10.
0011: if decode_sel3 set to 0x3h the GPCS3 will output from pin GP13.
0100: if decode_sel3 set to 0x4h the GPCS3 will output from pin GP14.
0101: if decode_sel3 set to 0x5h the GPCS3 will output from pin GP15.
1000: if decode_sel3 set to 0x8h the GPCS3 will output from pin GP20.
1001: if decode_sel3 set to 0x9h the GPCS3 will output from pin GP21.
1010: if decode_sel3 set to 0xAh the GPCS3 will output from pin GP22.
1011: if decode_sel3 set to 0xBh the GPCS3 will output from pin GP23.
default: disable.
8.11 GPIO Input Control Register – Index 15h
Power-on default [7:0] =0000_0000b
Bit
Name
R/W PWR
Description
7 GP17_OCTRL
6 GP16_OCTRL
5 GP15_OCTRL
GP17 in/out mode select: GP17 is input mode if set to 0. GP17 is output mode if set to 1.
R/W VDD3V
(If GPIO no enable “CR10 bit0”, This register will read only).
GP16 in/out mode select: GP16 is input mode if set to 0. GP16 is output mode if set to 1.
R/W VDD3V
(If GPIO no enable “CR10 bit0”, This register will read only).
GP15 in/out mode select: GP15 is input mode if set to 0. GP15 is output mode if set to 1.
R/W VDD3V
(If GPIO no enable “CR10 bit0”, This register will read only).
F85226
20
July, 2007
V0.25P