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F85226 Datasheet, PDF (26/44 Pages) Feature Integration Technology Inc. – LPC to ISA Bridge
Fintek
Feature Integration Technology Inc.
4 GP14_OCTRL
3 GP13_OCTRL
2 GP12_OCTRL
1 GP11_OCTRL
0 GP10_OCTRL
F85226
GP14 in/out mode select: GP14 is input mode if set to 0. GP14 is output mode if set to 1.
R/W VDD3V
(If GPIO no enable “CR10 bit0”, This register will read only).
GP13 in/out mode select: GP13 is input mode if set to 0. GP13 is output mode if set to 1.
R/W VDD3V
(If GPIO no enable “CR10 bit0”, This register will read only).
GP12 in/out mode select: GP12 is input mode if set to 0. GP12 is output mode if set to 1.
R/W VDD3V
(If GPIO no enable “CR10 bit0”, This register will read only).
GP11 in/out mode select: GP11 is input mode if set to 0. GP11 is output mode if set to 1.
R/W VDD3V
(If GPIO no enable “CR10 bit0”, This register will read only).
GP10 in/out mode select: GP10 is input mode if set to 0. GP10 is output mode if set to 1.
R/W VDD3V
(If GPIO no enable “CR10 bit0”, This register will read only).
8.12 GPIO Output Data Register – Index 16h
Power-on default [7:0] =0000_0000b
Bit
Name
R/W PWR
Description
GP17_DATA
7
When GP17 in out mode, set this bit to write data to pin GP17. (If GPIO no enable
R/W VDD3V
“CR10 bit0”, This register will read only).
GP16_DATA
6
When GP16 in out mode, set this bit to write data to pin GP16. (If GPIO no enable
R/W VDD3V
“CR10 bit0”, This register will read only).
GP15_DATA
5
When GP15 in out mode, set this bit to write data to pin GP15. (If GPIO no enable
R/W VDD3V
“CR10 bit0”, This register will read only).
GP14_DATA
4
When GP14 in out mode, set this bit to write data to pin GP14. (If GPIO no enable
R/W VDD3V
“CR10 bit0”, This register will read only).
GP13_DATA
3
When GP13 in out mode, set this bit to write data to pin GP13. (If GPIO no enable
R/W VDD3V
“CR10 bit0”, This register will read only).
GP12_DATA
2
When GP12 in out mode, set this bit to write data to pin GP12. (If GPIO no enable
R/W VDD3V
“CR10 bit0”, This register will read only).
GP11_DATA
1
When GP11 in out mode, set this bit to write data to pin GP11. (If GPIO no enable
R/W VDD3V
“CR10 bit0”, This register will read only).
GP10_DATA
0
When GP10 in out mode, set this bit to write data to pin GP10. (If GPIO no enable
R/W VDD3V
“CR10 bit0”, This register will read only).
8.13 GPIO1x Input Register – Index 17h
Power-on default [7:0] =pppp_ppppb (p: mean pin status)
Bit
Name
R/W PWR
Description
7 GP17_ST
RO VDD3V This bit is read only, when read back is the status of the pin GP17.
F85226
21
July, 2007
V0.25P