F85226 Datasheet, PDF (19/44 Pages) Feature Integration Technology Inc. – LPC to ISA Bridge

Fintek
SERIRQ Field
Parallel IRQ
1
Reserved
2
Reserved
3
Reserved
4
IRQ3
5
IRQ4
6
IRQ5
7
IRQ6
8
IRQ7
9
Reserved
10
IRQ9
11
IRQ10
12
IRQ11
13
IRQ12
14
Reserved
15
IRQ14
16
IRQ15
17
IOCHK#
21:18
Reserved
Table: SERIRQ map
Feature Integration Technology Inc.
F85226
Number of clocks after Start finished (Rising Edge)
2
5
8
11
14
17
20
23
26
29
32
35
38
41
44
47
50
53, 56, 59 , 62
7.3 LPC DMA
LPC DMA supports Signal, Demand, Verify and Increment operations. The DMA channels are
compatible with ISA interface. All channels can be encoded to LDRQ# in serial format even channel 4 that
requests a bus master to LPC host. Channels 0-3 are for 8-bit transaction and channel 5-7 are for 16-bit
transaction. F85226 also supports 32-bit DMA if LPC host issues. LDRQ# also refers to LCLK and samples
in negative edge by LPC host. ACT field indicates the DMA aborts or not.
LCLK
LDRQ#
MSB
START
Figure: LCLK and LDRQ#
LSB
ACT
START
F85226
14
July, 2007
V0.25P