GMS81C7216 Datasheet, PDF (86/121 Pages) List of Unclassifed Manufacturers – 8-BIT SINGLE-CHIP MICROCONTROLLERS

GMS81C7208/7216
23. POWER FAIL PROCESSOR
The GMS81C7208/16 has an on-chip low voltage detection cir-
cuitry to detect the V_DD voltage. A configuration register, LVDR
(address 0FB_H), can enable or disable the low voltage detect cir-
cuitry. Whenever V_DD falls close to or below 2.2V, the LVD0 is
just set to “1”, and if it recovering 3.4V, LVD0 is held to “1”. If
V_DD falls below around 3.4V range, the low voltage situation
may reset the MCU or freeze the clock according to setting of bit
5 (LVDM) of LVDR . The bit 4 LVD1 function is same with
LVD0 except different voltage level 2.1V. The detection voltage
is varied very little. See "7.3 DC Electrical Characteristics" on
page 10 for more detail voltage level.
In the in-circuit emulator, power fail function is not implemented
and user may not use it. Therefore, after completed development
of user program, this function may be experimented or evaluated
using by OTP.
When power fail certainly occur the MCU was reset, program no-
tify this Reset circumstance cause by LVD function. So, does not
erase the all RAM contents and operates subsequently as shown
in Figure .
LVDR
R/W
7
LVDE
R/W
6
LVDS
R/W R/W
5
4
LVDM LVD1
3
LVD0
ADDRESS: 0FB_H
INITIAL VALUE: 00_H
2
1
0
V_DD Detection Flag 1
0: Above 3.4V
1: Below 3.4V
V_DD Detection Flag 2
0: Above 2.1V
1: Below 2.1V
Operation Mode
0: Clock freeze
1: Reset
Power Fail Voltage Selection
0: 3.4V
1: 2.1V
Enable / Disable flag
0: Disable
1: Enable
Figure 23-1 Low Voltage Detector Register
RESET VECTOR
LVD0 =1
YES
NO
RAM CLEAR
INITIALIZE RAM DATA
INITIALIZE ALL PORTS
INITIALIZE REGISTERS
Skip the initial routine when
the Reset cause from power fail.
FUNTION
EXECUTION
Figure 23-2 S/W Example for RESET by Power Fail
82
FEB. 2005 Ver 1.04