GMS81C7216 Datasheet, PDF (59/121 Pages) List of Unclassifed Manufacturers – 8-BIT SINGLE-CHIP MICROCONTROLLERS

GMS81C7208/7216
Serial I/O mode register(SIOM) controls serial I/O function.
The POL bit control which edge.
According to SCK1 and SCK0, the internal clock or external
clock can be selected.
Serial I/O data register(SIOR) is an 8-bit shift register.
SCMR[1:0]
SCK[1:0]
POL
f_XIN
0X
reserved
1X
T0OV
(Timer 0 overflow)
÷ 4 ₀₀
÷ 16 ₀₁
10
Edge Detector
R05/SCLK PIN
SIO[1:0]
11
MUX
SIOST
SIOSF
start
complete
clear
CONTROL CIRCUIT
shift clock
clock
Octal Counter
SIOIF
overflow
Serial communication
Interrupt
SCLK OUT
SCK, SIO
R07/SIN PIN
SIO1
Serial IO Data
[0FF_H]
SIO0
R06/SOUT PIN
Figure 15-2 Block Diagram of SCI
15.1 Transmission/Receiving Timing
The serial transmission is started by setting SIOST(bit1 of
SIOM) to “1”. After one cycle of SCK, SIOST is cleared
automatically to “0”. The serial output data from 8-bit shift
register is output at falling edge of SCLK. And input data
is latched at rising edge of SCLK pin. When transmission
clock is counted 8 times, serial I/O counter is cleared as
‘0”. Transmission clock is halted in “H” state and serial I/
O interrupt(SIOIF) occurred.
SIOST
SCLK [R05]
(POL=0)
SOUT [R06]
SIN [R07]
SIOSF
SIOIF
(Interrupt Req.)
D0
D1
D2
D3
D4 D5
D6
D7
D0
D1
D2
D3
D4
D5
D6
D7
Figure 15-3 SPI Timing Diagram at POL=0
FEB. 2005 Ver 1.04
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