GMS81C7216 Datasheet, PDF (58/121 Pages) List of Unclassifed Manufacturers – 8-BIT SINGLE-CHIP MICROCONTROLLERS

GMS81C7208/7216
15. SERIAL COMMUNICATION
The serial interface is used to transmit/receive 8-bit data serially.
Serial communication block consists of serial I/O data register,
serial I/O mode register, clock selection circuit, octal counter and
control circuit as illustrated in Figure 15-1.Pin R07/SIN, R06/
SOUT and R05/SCLK pins are controlled by the serial mode reg-
ister. The contents of the Serial I/O data register can be written
into or read out by software.
The serial communication is activated by the instruction “SET1
SIOST”. The octal counter is reset to “0” by this instruction, starts
counting at the falling or rising edge (by POL selection) of the
transmit clock (SCLK), and it increments at the every clock. A se-
rial interrupt request flag is set when the eighth transmit clock
signal is input (the serial interface is reset) or when serial commu-
nication is discontinued (the octal counter is reset).
The data in the serial data register can be shifted synchronously
with the transfer clock signal.
SCK1 SCK0
0
0
0
1
1
0
1
1
SCLK/R05 Port
SCLK output
SCLK output
SCLK output
SCLK input
Clock Source
Internal clock
Internal clock
Internal clock
External clock
Prescaler Divide Ratio
÷4
÷ 16
Use clock from Timer 0 overflow
-
SIOM
SIOR
R/W
7
POL
R/W
6
MSB
R/W R/W R/W R/W R/W R
5
4
3
2
1
0
SIO1 SIO0 BSTCCKL1 SCK0 SIOST SIOSF
ADDRESS: 0FE_H
INITIAL VALUE: 0000_0001_B
MSB first or LSB first
0: LSB First
1: MSB First
Serial transmission status bit
0: Serial transmission is in progress
1: Serial transmission is completed
Serial transmission start bit
Setting this bit starts an Serial transmission.
After one cycle, bit is cleared to “0” by hardware.
Serial transmission clock selection
00: f_XIN ÷ 4
01: f_XIN ÷ 16
10: Timer 0 Overflow
11: External Clock
Serial transmission operation Mode
00: Normal Port(R05,R06,R07)
01: Sending Mode(SCLK,SOUT,R07)
10: Receiving Mode(SCLK,R06,SIN)
11: Sending & Receiving Mode(SCLK,SOUT,SIN)
Selection polarity
0: Data in on rising edge, data out on falling edge
1: Data in on falling edge, data out on rising edge
R/W R/W R/W R/W R/W R/W R/W R/W
76543210
BTCL
ADDRESS: 0FF_H
INITIAL VALUE: Undefined
Sending data during sending Mode
Receiving data during receiving Mode
Figure 15-1 SCI Control Register
54
FEB. 2005 Ver 1.04