GMS81C7216 Datasheet, PDF (53/121 Pages) List of Unclassifed Manufacturers – 8-BIT SINGLE-CHIP MICROCONTROLLERS

GMS81C7208/7216
13.2 16-bit Timer / Counter Mode
The Timer register is being run with all 16 bits. A 16-bit Timer/
Counter register T0, T1 are incremented from 0000_H until it
matches TDR0, TDR1 and then resets to 0000_H. The match out-
put generates Timer 0 interrupt.
The clock source of the Timer 0 is selected either internal or ex-
ternal clock by bit T0SL1, T0SL0.
Even if the Timer 0 (including the Timer 1) is used as a 16-bit
timer, the Timer 2 and Timer 3 can still be used as either two 8-
bit timer or one 16-bit timer by setting the TM2. Reversely, even
if the Timer 2 (including the Timer 3) is used as a 16-bit timer,
the Timer 0 and Timer 1 can still be used as 8-bit timer indepen-
dently.
TM0
TM1
7
6
5
4
3
2
1
0
-
- CAP0 T0CK2 TB0TCCKL1 T0CK0 T0CN T0ST
X
X
0
X
X
X
X
X
- 16BIT0 - CAP1 TB1TCCKL1 T1CK0 T1CN T1ST
X
1
0
0
1
1
X
X
X means don’t care
ADDRESS: 0E0_H
INITIAL VALUE: 00_H
ADDRESS: 0E2_H
INITIAL VALUE: 00_H
T0CK[2:0]
Edge Detector
EC0 PIN
SCMR[1:0]
f_XIN
0X
reserved ^1X
111
÷ 2048
÷ 512
÷ 128
÷ 32
÷8
÷4
÷2
110
101
100
011
010
001
000
MUX
0
1
T0CN
T0ST
0: Stop
1: Clear and start
T1
T0
(16-bit)
clear
Comparator
TDR1
TDR0
Higher byte Lower byte
COMPARE DATA
T0IF
TIMER 0 + TIMER 1 → TIMER 0 (16-bit)
TIMER 0 INTERRUPT
(Not Timer 1 interrupt)
TM2
TM3
7
6
5
4
3
2
1
0
-
- CAP2 T2CK2 TB2TCCKL1 T2CK0 T2CN T2ST
X
X
0
X
X
X
X
X
- 16BIT1 - CAP3 TB3TCCKL1 T3CK0 T3CN T3ST
X
1
0
0
1
1
X
X
X means don’t care
ADDRESS: 0E6_H
INITIAL VALUE: 00_H
ADDRESS: 0E8_H
INITIAL VALUE: 00_H
T2CK[2:0]
Edge Detector
EC2 PIN
SCMR[1:0]
f_XIN
1X
reserved
1X
111
÷ 2048
÷ 512
÷ 128
÷ 32
÷8
÷4
÷2
110
101
100
011
010
001
000
MUX
0
1
T2CN
TIMER 0 + TIMER 1 → TIMER 0 (16-bit)
T2ST
0: Stop
1: Clear and start
T3
T2
(16-bit)
clear
Comparator
TDR3
TDR2
Higher byte Lower byte
COMPARE DATA
T2IF
TIMER 2 INTERRUPT
(Not Timer 3 interrupt)
Figure 13-9 16-bit Timer/Counter
FEB. 2005 Ver 1.04
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